MIC4223/MIC4224/MIC4225 Dual 4A, 4.5V to 18V, 15ns Switch Time, Low-Side MOSFET Drivers with Enable General Description Features The MIC4223/MIC4224/MIC4225 are a family of a dual 4A, 4.5V to 18V supply voltage operating range High-Speed, Low-side MOSFET drivers with logic-level High peak source/sink current driver enables. The devices are fabricated on Micrels 3A at V = 8V DD Bipolar/CMOS/DMOS (BCD) process and operate from a 4A at V = 12V DD 4.5V to 18V supply voltage. The devices parallel Bipolar 15ns/15ns Rise and Fall times with 2000pF load and CMOS output stage architecture provides high-current throughout the MOSFETs Miller Region allowing the driver 25ns/35ns (Rising/Falling) input propagation delay to sink and source 4A of peak current from a 12V supply 20ns/45ns (Rising/Falling) enable propagation delay and quickly charge and discharge a 2000pF load Active-high driver enable inputs with 100k pull-ups capacitance in under 15ns, while allowing the outputs to CMOS and TTL logic input and enable thresholds swing within 0.3V of V and 0.16V of ground. DD independent of supply voltage The MIC4223/MIC4224/MIC4225 driver and enable inputs Driver input protection to -5V at -40mA feature TTL and CMOS logic-level thresholds which are independent of supply voltage. Each driver features a Output Latch-up protection to >500mA reverse current dedicated active-high enable input which is internally Industry standard pin out with two package options pulled high to V through 100k , allowing the pins to be DD ePAD MSOP-8 ( = 60C/W) JA left unconnected if it is not required to disable the driver 8-pin SOIC ( = 120 C/W) JA outputs. The driver inputs have been designed to protect against ground bounce and are protected to withstand -5V Available in dual-inverting (MIC4223), dual non- inverting (MIC4224) and complementary (MIC4225) of voltage swing at -40mA. Driver outputs are also protected to withstand 500mA of reverse current. Dual output drive by paralleling channels The MIC4223/MIC4224/MIC4225 are available in three -40C to +125C operating junction temperature range configurations using industry standard pin out dual inverting (MIC4223), dual non-inverting (MIC4224) and Block Diagram complimentary (MIC4225). They are available in 8-pin SOIC and thermally enhanced e-PAD 8-pin MSOP and support operating junction temperatures from -40C to +125C. Applications High-Efficiency MOSFET switching Switch mode power supplies DC-to-DC converters Motor and solenoid drivers Clock and line drivers Synchronous rectifiers Pulse transformer drive Class D switching amplifiers Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (408) 944-0800 fax + 1 (408) 474-1000 Micrel, Inc. MIC4223/MIC4224/MIC4225 Ordering Information Part Number Configuration Junction Temp. Range Package Lead Finish MIC4223YM Dual Inverting 40 to +125C 8-pin SOIC Pb-Free MIC4223YMME Dual Inverting 40 to +125C 8-pin EPAD-MSOP Pb-Free MIC4224YM Dual Non-inverting 40 to +125C 8-pin SOIC Pb-Free MIC4224YMME Dual Non-inverting 40 to +125C 8-pin EPAD-MSOP Pb-Free MIC4225YM Inverting + Non-inverting 40 to +125C 8-pin SOIC Pb-Free MIC4225YMME Inverting + Non-inverting 40 to +125C 8-pin EPAD-MSOP Pb-Free Pin Configuration 8-Pin SOIC (YM) 8-Pin SOIC (YM) 8-Pin SOIC (YM) 8-Pin ePAD MSOP (YMME) 8-Pin ePAD MSOP (YMME) 8-Pin ePAD-MSOP (YMME) Pin Description Pin Number Pin Name Pin Function 1 ENA Enable pin for output A. TTL/CMOS-compatible logic input. A logic-level high enables the device. An internal pull-up enables the part if pin is open. A logic-level low disables the device and the output will be low regardless of the input state. 2 INA Control Input A: TTL/CMOS-compatible logic input. Connect to V or ground if not used and DD connect ENA to ground to disable driver A. 3 GND Ground 4 INB Control Input B: TTL/CMOS compatible logic input. Connect to V or ground if not used and DD connect ENB to ground to disable driver B. 5 OUTB Output B: Parallel Bipolar/CMOS output. 6 VDD Voltage Supply Input: +4.5V to +18V 7 OUTA Output A: Parallel Bipolar/CMOS output. 8 ENB Enable pin for output B. TTL/CMOS-compatible logic input. A logic-level high enables the device. An internal pull-up enables the part if pin is open. A logic-level low disables the device and the output will be low regardless of the input state. EP GND Exposed thermal pad for ePad MSOP package only (Not available on SOIC-8L package). Connect to ground. Must make a full connection to the ground plane to maximize thermal performance of the package. M9999-061109-A June 2009 2 (408) 944-0800