MIC47053 500mA Micropower ULDO Linear Regulator General Description Features The MIC47053 is a high-speed, adjustable output ultra-low Wide input voltage range dropout, dual NMOS ULDO designed to power point-of- Input voltage: 1.0V to 3.6V load applications that require a low-voltage, high-current Bias voltage: 2.3V to 5.5V power supply. The MIC47053 can source 500mA of output Adjustable output voltage range down to 0.4V current while only requiring a 1F ceramic output capacitor Low dropout voltage of 49mV at 500mA for stability. The MIC47053 offers 2% output voltage accuracy over temperature, low dropout voltage (49mV Low shutdown current: 0.1A typical 500mA), and low ground current which makes this device 2% initial output voltage accuracy over temperature ideally suited for mobile and point-of-load applications. High bandwidth very fast transient response The MIC47053 has an NMOS output stage offering very Stable with a 1F ceramic output capacitor low output impedance. The NMOS output stage makes for Logic level enable input a unique ability to respond very quickly to sudden load changes such as that required by a microprocessor, DSP UVLO on both supply voltages or FPGA. The MIC47053 consumes little quiescent current Available in thermally-enhanced 2mm x 2mm Thin DFN and therefore can be used for driving the core voltages of package mobile processors and post regulating a core DC/DC Junction temperature range of 40 C to +125 C converter in any processor. The MIC47053 is available in the tiny 2mm x 2mm Thin Applications DFN packages with an operating junction temperature range of 40C to 125 C. Point-of-load applications Data sheets and support documentation can be found on PDAs, Notebooks, and Desktops Micrels web site at: www.micrel.com. DSP, PLD, and FPGA power supply Low-voltage post regulation Typical Application ULDO is a trademark of Micrel Inc. Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (408) 944-0800 fax + 1 (408) 474-1000 Micrel, Inc. MIC47053 Ordering Information (1) (2,3) Part Number Marking Code Output Voltage Package Lead Finish MIC47053YMT ADJ 8 pin 2mm x 2mm Thin DFN Pb-Free Z53 Notes: 1. Over bar symbol ( ) may not be to scale. 2. Thin DFN is a GREEN RoHS-compliant package. Lead finish is NiPdAu. Mold compound is Halogen Free. 3. Thin DFN package Pin 1 identifier = . Pin Configuration 8-Pin 2mm x 2mm Thin DFN (MT) Top View Pin Description Pin Number Pin Name Pin Function 1 BIAS Bias Supply. The bias supply is the power supply for the internal circuitry of the regulator. 2 GND Ground. Ground pins and exposed pad must be connected externally. Input Supply. Drain of NMOS pass transistor which is the power input voltage for regulator. The 3, 4 IN NMOS pass transistor steps down this input voltage to create the output voltage. 5 OUT Output. Output Voltage of Regulator. 6 ADJ Adjust Input. Connect external resistor divider to program the output voltage. Power Good Output. Open-drain output. Output is driven low when the output voltage is less than the 7 PGOOD power good threshold of its programmed nominal output voltage. When the output goes above the power good threshold, the open-drain output goes high-impedance, allowing it to be pulled up to a fixed voltage. 8 EN Enable: TTL/CMOS compatible input. Logic high = enable, logic low = shutdown. EP ePad Exposed thermal pad. Connect to the ground plane to maximize thermal performance. M9999-080712-B August 2012 2