SY89544U 2.5V, 3.2 Gbps, Differential 4:1 LVDS Multiplexer with Internal Input Termination Features General Description Selects Among Four Differential Inputs The SY89544U is a fast, low-jitter, 4:1 differential MUX with an LVDS-compatible (350mV) output with Guaranteed AC Performance over Temperature guaranteed data rate throughput of 3.2Gbps over and Voltage: temperature and voltage. - DC-to >3.2 Gbps Data Rate Throughput The SY89544U differential inputs include a unique, - <510 ps In-to-Q t PD 3-pin internal termination that allows access to the - <150 ps t /t r f termination network through a VT pin. This feature Ultra Low-Jitter Design: allows the device to easily interface to different logic -<1ps Random Jitter RMS standards, both AC- and DC-coupled without external -<10ps Deterministic Jitter resistor-bias and termination networks. The result is a PP clean, stub-free, low-jitter interface solution. Total Jitter (Clock) -<10ps PP -<0.7ps Crosstalk-Induced Jitter The SY89544U operates from a single 2.5V supply and RMS Unique Input Isolation Design Minimizes is guaranteed over the full industrial temperature range (40C to +85C). For applications that require a 3.3V Crosstalk supply, consider the SY89545L. For applications that Internal Input Termination require two differential outputs, consider the Unique Input Termination and VT Pin Accepts SY89546U or SY89547L. The SY89544U is part of DC-Coupled and AC-Coupled Inputs (LVDS, Microchips Precision Edge product family. LVPECL, CML) 350 mV LVDS Output Swing Package Type CMOS/TTL-Compatible MUX Select SY89544U Power Supply 2.5V 5% 32-Lead 5x5 QFN (M) 40C to +85C Temperature Range Available in 32-Lead (5 mm x 5 mm) QFN Package 32 31 30 29 28 27 26 25 Applications 1 24 VCC VCC SONET/SDH Channel Select 23 /IN0 2 IN3 Fibre Channel Multi-Channel Select VT0 3 22 VT3 Gigabit Ethernet Multi-Channel Select 4 21 IN0 /IN3 5 20 VCC VCC 6 19 SEL0 SEL1 7 18 GND GND VCC VCC 8 17 910 11 1213 14 1516 United States Patent No. RE44,134 2019 Microchip Technology Inc. DS20006174A-page 1 IN1 GND Q VT1 /Q /IN1 GND VCC GND VCC NC IN2 NC VT2 /IN2 GNDSY89544U Functional Block Diagram IN0 50 V T0 50 /IN0 4:1 MUX 0 IN1 50 V T1 LVDS 50 /IN1 1 Q MUX /Q IN2 2 50 V T2 50 S1 /IN2 S0 3 IN3 50 V T3 50 /IN3 SEL0 SEL1 DS20006174A-page 2 2019 Microchip Technology Inc.