Supertex inc. TC7920 Two Pair, N- and P-Channel Enhancement-Mode MOSFET with Drain-Diodes Features General Description High voltage Vertical DMOS technology The Supertex TC7920 consists of two pairs of high voltage, low Integrated drain output high voltage diodes threshold N-channel and P-channel MOSFETs in a 12-Lead DFN package. All MOSFETs have integrated the output drain Integrated gate-to-source resistor high voltage diodes, gate-to-source resistors and gate-to-source Integrated gate-to-source Zener diode Zener diode clamps which are desired for high voltage pulser Low threshold, Low on-resistance applications. The complimentary, high-speed, high voltage, gate- Low input & output capacitance clamped N and P-channel MOSFET pairs utilize an advanced Fast switching speeds vertical DMOS structure and Supertexs well-proven silicon-gate Electrically isolated N- and P-MOSFET pairs manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the Applications high input impedance and positive temperature coefficient inherent High voltage pulsers in MOS devices. Amplifiers Buffers Characteristic of all MOS structures, these devices are free from Piezoelectric transducer drivers thermal runaway and thermally induced secondary breakdown. General purpose line drivers Supertexs vertical DMOS FETs are ideally suited to a wide range Logic level interfaces of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input and output capacitance, and fast switching speeds are desired. Typical Application Circuit V PP +100V +10V 0.47F 1.0F 0.1F VDD VH OE ENAB OUTA INA +PULSE 1.8 to 5.0V V OUTB NN Logic Imputs INB -100V -PULSE OUTC 1.0F INC DAMP OUTD IND GND VSS VL Supertex MD1822 10nF Supertex TC7920 Doc. DSFP-TC7920 Supertex inc. B080613 www.supertex.comTC7920 Ordering Information Product Summary Part Number Package Option Packing BV /BV R (max) DSS DGS DS(ON) TC7920K6-G 12-Lead DFN 3000/Reel N-Channel P-Channel N-Channel P-Channel 200V -200V 7.0 8.0 Absolute Maximum Ratings Parameter Value Pin Configuration Drain-to-source voltage BV DSS 1 GN1 12 SN1 Drain-to-gate voltage BV DGS 2 GP1 11 DN1 Operating and storage temperature -55C to +150C Thermal GN2 3 10 DP1 Pad Absolute Maximum Ratings are those values beyond which damage to the 4 SN2 9 SP1 device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect 5 GP2 8 DN2 device reliability. All voltages are referenced to device ground. SP2 6 7 DP2 Typical Thermal Resistance 12-Lead DFN Package ja (top view) O 12-Lead DFN 42 C/W Note: Package Marking 1.0oz, 4-layer, 3x4 PCB. Y = Last Digit of Year Sealed 7920 W = Code for Week Sealed YWLL L = Lot Number = Green Packaging Package may or may not include the following marks: Si or 12-Lead DFN Drain Output Diodes Sym Parameter Min Typ Max Unit Condition V Breakdown voltage 200 - - V I = 100A R R VF Forward voltage - 1.25 - V I = 100mA F I Park forward current - 3.0 - A Pulse width = 1.0s, D% = 1%, One diode FM O - 1.0 - V = 100 V, T = 25 C R A I Reverse current A R O - 100 - V = 100 V, T = 125 C R A t Reverse recovery time - 1.0 - s I = I = 10mA, I = 1.0 mA, R = 100 rr F R RR L Pin Description Pin Function Description Pin Function Description 1 GN1 Gate of N-MOSFET 1 7 DP2 Drain of P-MOSFET 2 2 GP1 Gate of P-MOSFET 1 8 DN2 Drain of N-MOSFET 2 3 GN2 Gate of N-MOSFET 2 9 SP1 Source of P-MOSFET 1 4 SN2 Source of N-MOSFET 2 10 DP1 Drain of P-MOSFET 1 5 GP2 Gate of P-MOSFET 2 11 DN1 Drain of N-MOSFET 1 6 SP2 Source of P-MOSFET 2 12 SN1 Source of N-MOSFET 1 Thermal Pad Die attachment substrate, must be grounded externally Doc. DSFP-TC7920 Supertex inc. B080613 2 www.supertex.com