Data Sheet ZL40234 Low Skew, Low Additive Jitter, 4 Output LVPECL/LVDS/HCSL Fanout Buffer with one LVCMOS output Ordering Information Features ZL40234LDG1 32 pin QFN Trays 3 to 1 input Multiplexer: Two inputs accept any ZL40234LDF1 32 pin QFN Tape and Reel differential (LVPECL, HCSL, LVDS, SSTL, CML, LVCMOS) or a single ended signal and the third Package size: 5 x 5 mm input accepts a crystal or a single ended signal -40 C to +85 C Four differential LVPECL/LVDS/HCSL outputs Applications One LVCMOS output General purpose clock distribution Ultra-low additive jitter: 24fs (in 12kHz to 20MHz Low jitter clock trees integration band at 625MHz clock frequency) Logic translation Supports clock frequencies from 0 to 1.6GHz Clock and data signal restoration Supports 2.5V or 3.3V power supplies for LVPECL, LVDS or HCSL outputs Wired communications: OTN, SONET/SDH, GE, 10 GE, FC and 10G FC Supports 1.5V, 1.8V, 2.5V or 3.3V for LVCMOS PCI Express generation 1/2/3/4 clock distribution output Wireless communications Embedded Low Drop Out (LDO) Voltage regulator provides superior Power Supply Noise Rejection High performance microprocessor clock distribution Test Equipment Maximum output to output skew of 40ps Device controlled via control pins OUT TYPE SEL0 OUT TYPE SEL1 OUT TYPE SEL 1:0 OUTPUTs LVECL 00 OUT0 p 01 LVDS IN SEL0 OUT0 n HCSL 10 IN SEL1 11 HIGH-Z OUT1 p IN0 p OUT1 n IN0 n IN1 p IN1 n OUT2 p OUT2 n ZL40234 OUT3 p XOUT OUT3 n XIN OUT LVCMOS Synchronous LVCMOS OE OE Figure 1. Functional Block Diagram ZL40234 September 2018 1 2018 Microsemi Corporation Data Sheet ZL40234 Table of Contents Features ..................................................................................................................................... 1 Applications................................................................................................................................ 1 Table of Contents ...................................................................................................................... 2 Pin Diagram ............................................................................................................................... 5 Pin Descriptions ......................................................................................................................... 6 Functional Description ............................................................................................................... 8 Clock Inputs ............................................................................................................................... 8 Clock Outputs .......................................................................................................................... 11 Crystal Oscillator Input ............................................................................................................. 12 Termination of unused inputs and outputs .............................................................................. 12 Power Consumption ................................................................................................................ 12 Power Supply Filtering ............................................................................................................. 13 Power Supplies and Power-up Sequence ............................................................................... 13 Device Control ......................................................................................................................... 14 Typical device performance ..................................................................................................... 15 AC and DC Electrical Characteristics ...................................................................................... 19 Absolute Maximum Ratings ..................................................................................................... 19 Recommended Operating Conditions ..................................................................................... 19 Change History ........................................................................................................................ 33 Package Outline ...................................................................................................................... 34 ZL40234 September 2018 2 2018 Microsemi Corporation