Product Information

74HC27D-Q100J

74HC27D-Q100J electronic component of Nexperia

Datasheet
NXP Semiconductors Logic Gates

Manufacturer: Nexperia
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Price (USD)

1: USD 0.3795 ea
Line Total: USD 0.38

1229 - Global Stock
Ships to you between
Thu. 09 May to Mon. 13 May
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
1228 - Global Stock


Ships to you between Thu. 09 May to Mon. 13 May

MOQ : 1
Multiples : 1

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74HC27D-Q100J
Nexperia

1 : USD 0.3795
10 : USD 0.3312
100 : USD 0.2507
500 : USD 0.2024
1000 : USD 0.161
2500 : USD 0.1484
10000 : USD 0.1357
25000 : USD 0.1334
50000 : USD 0.1311

     
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RoHS - XON
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74HC27-Q100 74HCT27-Q100 Triple 3-input NOR gate Rev. 2 10 September 2020 Product data sheet 1. General description The 74HC27-Q100 74HCT27-Q100 is a triple 3-input NOR gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of V . CC This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 C to +85 C and from -40 C to +125 C Wide supply voltage range from 2.0 V to 6.0 V CMOS low power dissipation High noise immunity Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Complies with JEDEC standards: JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V) Input levels: For 74HC27-Q100: CMOS level For 74HCT27-Q100: TTL level ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) Multiple package options DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC27D-Q100 -40 C to +125 C SO14 plastic small outline package 14 leads SOT108-1 body width 3.9 mm 74HCT27D-Q100 74HC27PW-Q100 -40 C to +125 C TSSOP14 plastic thin shrink small outline package 14 leads SOT402-1 body width 4.4 mm 74HCT27PW-Q100 74HC27BQ-Q100 -40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced SOT762-1 very thin quad flat package no leads 14 terminals 74HCT27BQ-Q100 body 2.5 3 0.85 mmNexperia 74HC27-Q100 74HCT27-Q100 Triple 3-input NOR gate 4. Functional diagram 1 1 2 12 1 1A 13 2 1B 1Y 12 13 1C 3 1 3 2A 4 6 4 2B 2Y 6 5 5 2C A 9 3A 9 1 10 8 3B 3Y 10 8 Y B 11 3C 11 C mna936 mna935 mna937 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Logic diagram (one gate) 5. Pinning information 5.1. Pinning 74HC27 74HCT27 terminal 1 index area 1B 2 13 1C 74HC27 74HCT27 2A 3 12 1Y 2B 4 11 3C 1A 1 14 V CC 2C 5 (1) 10 3B GND 1B 2 13 1C 6 9 2Y 3A 2A 3 12 1Y 2B 4 11 3C aaa-007685 2C 5 10 3B 2Y 6 9 3A Transparent top view GND 7 8 3Y (1) This is not a ground pin. There is no electrical or mechanical requirement to solder the pad. In case 001aag759 soldered, the solder land should remain floating or connected to GND. Fig. 4. Pin configuration SOT108-1 (SO14) and SOT402-1 (TSSOP14) Fig. 5. Pin configuration SOT762-1 (DHVQFN14) 5.2. Pin description Table 2. Pin description Symbol Pin Description 1A, 2A, 3A 1, 3, 9 data input 1B, 2B, 3B 2, 4, 10 data input 1C, 2C, 3C 13, 5, 11 data input 1Y, 2Y, 3Y 12, 6, 8 data output GND 7 ground (0 V) V 14 supply voltage CC 74HC HCT27 Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 2 10 September 2020 2 / 12 GND 7 1 1A 3Y 8 14 V CC

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Nexperia
NEXPERIA USA INC
Nexperia USA Inc.

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