Product Information

74HC4017N

74HC4017N electronic component of Nexperia

Datasheet
IC, 74HC CMOS, 74HC4017, DIP16, 5V

Manufacturer: Nexperia
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 2.0004 ea
Line Total: USD 2

0 - Global Stock
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
0 - Warehouse 1


Ships to you between Mon. 06 May to Fri. 10 May

MOQ : 1
Multiples : 1

Stock Image

74HC4017N
Nexperia

1 : USD 1.6878
10 : USD 1.4189
50 : USD 1.4103
100 : USD 1.1867
250 : USD 0.8943
500 : USD 0.7954

     
Manufacturer
Product Category
Brand
Logic Family / Base Number
Counter Type
Clock Frequency
Count Maximum
Logic Case Style
No. Of Pins
Supply Voltage Min
Supply Voltage Max
Logic Ic Family
Logic Ic Base Number
Operating Temperature Min
Operating Temperature Max
Rohs Phthalates Compliant
Svhc
Base Number
Count Max
Ic Generic Number
Logic Function Number
Logic Ic Function
Operating Temperature Range
Supply Voltage
Supply Voltage Range
Termination Type
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74HC4017 74HCT4017 Johnson decade counter with 10 decoded outputs Rev. 4 10 December 2013 Product data sheet 1. General description The 74HC4017 74HCT4017 is a 5-stage Johnson decade counter with 10 decoded outputs (Q0 to Q9), an output from the most significant flip-flop (Q5-9), two clock inputs (CP0 and CP1) and an overriding asynchronous master reset input (MR). The counter is advanced by either a LOW-to-HIGH transition at CP0 while CP1 is LOW or a HIGH-to-LOW transition at CP1 while CP0 is HIGH. When cascading counters, the Q5-9 output, which is LOW while the counter is in states 5, 6, 7, 8 and 9, can be used to drive the CP0 input of the next counter. A HIGH on MR resets the counter to zero (Q0 = Q5-9 = HIGH Q1 to Q9 = LOW) independent of the clock inputs (CP0 and CP1). Automatic code correction of the counter is provided by an internal circuit: following any illegal code the counter returns to a proper counting mode within 11 clock pulses. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of V . CC 2. Features and benefits Wide supply voltage range from 2.0 V to 6.0 V Input levels: For 74HC4017: CMOS level For 74HCT4017: TTL level Complies with JEDEC standard no. 7 A ESD protection: HBM JESD22-A114E exceeds 2000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from 40 Cto+85 C and from 40 Cto+125 CNXP Semiconductors 74HC4017 74HCT4017 Johnson decade counter with 10 decoded outputs 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC4017 74HC4017N 40 C to +125 C DIP16 plastic dual in-line package 16 leads (300 mil) SOT38-4 74HC4017D 40 C to +125 C SO16 plastic small outline package 16 leads SOT109-1 body width 3.9 mm 74HC4017DB 40 C to +125 C SSOP16 plastic shrink small outline package 16 leads SOT338-1 body width 5.3 mm 74HC4017PW 40 Cto+125 C TSSOP16 plastic thin shrink small outline package 16 leads SOT403-1 body width 4.4 mm 74HC4017BQ 40 Cto+125 C DHVQFN16 plastic dual in-line compatible thermal-enhanced SOT763-1 very thin quad flat package no leads 16 terminals body 2.5 3.5 0.85 mm 74HCT4017 74HCT4017N 40 C to +125 C DIP16 plastic dual in-line package 16 leads (300 mil) SOT38-4 74HCT4017D 40 C to +125 C SO16 plastic small outline package 16 leads SOT109-1 body width 3.9 mm 74HCT4017BQ 40 Cto+125 C DHVQFN16 plastic dual in-line compatible thermal-enhanced SOT763-1 very thin quad flat package no leads 16 terminals body 2.5 3.5 0.85 mm 4. Functional diagram CP1 13 CP0 14 5-STAGE JOHNSON COUNTER MR 15 Q5-9 DECODING AND OUTPUT CIRCUITRY 12 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 3 2 4 7 10 1 5 6 9 11 001aah242 Fig 1. Functional diagram 74HC HCT4017 All information provided in this document is subject to legal disclaimers. NXP B.V. 2013. All rights reserved. Product data sheet Rev. 4 10 December 2013 2 of 24

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