74HC4060D-Q100,118

74HC4060-Q100 74HCT4060-Q100 14-stage binary ripple counter with oscillator Rev. 4 8 September 2021 Product data sheet 1. General description The 74HC4060-Q100 74HCT4060-Q100 is a 14-stage ripple-carry counter/divider and oscillator with three oscillator terminals (RS, RTC and CTC), ten buffered parallel outputs (Q3 to Q9 and Q11 to Q13) and an overriding asynchronous master reset (MR). The oscillator configuration allows design of either RC or crystal oscillator circuits. The oscillator may be replaced by an external clock signal at input RS. In this case, keep the oscillator pins (RTC and CTC) floating. The counter advances on the HIGH-to-LOW transition of RS. A HIGH level on MR clears all counter stages and forces all outputs LOW, independent of the other input conditions. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of V . CC This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 C to +85 C and from -40 C to +125 C Wide supply voltage range from 2.0 to 6.0 V CMOS low power dissipation High noise immunity Latch-up performance exceeds 100 mA per JESD 78 Class II Level B All active components on chip RC or crystal oscillator configuration Input levels: For 74HC4060-Q100: CMOS level For 74HCT4060-Q100: TTL level Complies with JEDEC standards: JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V) ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) Multiple package options DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints 3. Applications Control counters Timers Frequency dividers Time-delay circuitsNexperia 74HC4060-Q100 74HCT4060-Q100 14-stage binary ripple counter with oscillator 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC4060D-Q100 -40 C to +125 C SO16 plastic small outline package 16 leads SOT109-1 body width 3.9 mm 74HCT4060D-Q100 74HC4060PW-Q100 -40 C to +125 C TSSOP16 plastic thin shrink small outline package 16 leads SOT403-1 body width 4.4 mm 74HC4060BQ-Q100 -40 C to +125 C DHVQFN16 plastic dual in-line compatible thermal SOT763-1 enhanced very thin quad flat package no leads 74HCT4060BQ-Q100 16 terminals body 2.5 3.5 0.85 mm 5. Functional diagram 10 9 CTR14 CTR14 RTC CTC 3 7 3 7 G RS Q3 7 9 CTC 5 5 11 Q4 5 10 RTC 4 4 + MR 12 Q5 4 AND 11 RS 6 11 6 + Q6 6 12 MR 14 12 14 CT CT Q7 14 13 13 Q8 13 CT = 0 9 15 CT = 0 9 15 Q9 15 11 1 11 1 Q11 1 2 2 Q12 2 13 3 13 3 Q13 3 (a) (b) 001aai467 001aai468 Fig. 1. Logic symbol Fig. 2. IEC logic symbol 10 9 RTC CTC RS 11 CP 14-STAGE BINARY COUNTER MR MR 12 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q11 Q12 Q13 7 5 4 6 14 13 15 1 2 3 001aai113 Fig. 3. Functional diagram CTC FF FF FF FF FF RTC 1 4 10 12 14 RS CP CP CP CP CP Q Q Q Q Q MR MR MR MR MR MR Q3 Q9 Q11 Q13 001aai114 Fig. 4. Logic diagram 74HC HCT4060 Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 4 8 September 2021 2 / 19