74LVC2G04GM,115 Nexperia

74LVC2G04 Dual inverter Rev. 11 29 September 2021 Product data sheet 1. General description The 74LVC2G04 is a dual inverter. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power-down applications using I . The I circuitry OFF OFF disables the output, preventing the damaging backflow current through the device when it is powered down. 2. Features and benefits Wide supply voltage range from 1.65 V to 5.5 V Overvoltage tolerant inputs to 5.5 V High noise immunity Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C (2.7 V to 3.6 V) JESD36 (4.6 V to 5.5 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V 24 mA output drive (V = 3.0 V) CC CMOS low power dissipation Latch-up performance exceeds 250 mA Direct interface with TTL levels I circuitry provides partial Power-down mode operation OFF Multiple package options Specified from 40 C to +85 C and 40 C to +125 C.Nexperia 74LVC2G04 Dual inverter 3. Ordering information Table 1. Ordering information Type number Package Temperature Name Description Version range 74LVC2G04GW -40 C to +125 C SC-88 plastic surface-mounted package 6 leads SOT363 74LVC2G04GV -40 C to +125 C SC-74 plastic surface-mounted package 6 leads SOT457 TSOP6 74LVC2G04GM -40 C to +125 C XSON6 plastic extremely thin small outline package no leads SOT886 6 terminals body 1 1.45 0.5 mm 74LVC2G04GN -40 C to +125 C XSON6 extremely thin small outline package no leads SOT1115 6 terminals body 0.9 1.0 0.35 mm 74LVC2G04GS -40 C to +125 C XSON6 extremely thin small outline package no leads SOT1202 6 terminals body 1.0 1.0 0.35 mm 74LVC2G04GX -40 C to +125 C X2SON6 plastic thermal enhanced extremely SOT1255-2 thin small outline package no leads 6 terminals body 1.0 0.8 0.32 mm 4. Marking Table 2. Marking Type number Marking code 1 74LVC2G04GW V4 74LVC2G04GV V04 74LVC2G04GM V4 74LVC2G04GN V4 74LVC2G04GS V4 74LVC2G04GX V4 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 1 1 6 1Y 1 1A 6 2A 2Y 4 3 1 3 4 A Y mnb079 mnb080 mna110 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Logic diagram (one gate) 74LVC2G04 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 11 29 September 2021 2 / 16