Product Information

74LVT16543ADGGY

74LVT16543ADGGY electronic component of Nexperia

Datasheet
Bus Transceivers 3.3V 16-bit registered transceiver; 3-state

Manufacturer: Nexperia
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 2.852 ea
Line Total: USD 2.85

222 - Global Stock
Ships to you between
Mon. 27 May to Wed. 29 May
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
222 - WHS 1


Ships to you between Mon. 27 May to Wed. 29 May

MOQ : 1
Multiples : 1
1 : USD 2.852
250 : USD 2.1045
500 : USD 1.978
1000 : USD 1.8285
2000 : USD 1.449
4000 : USD 1.449
10000 : USD 1.3915

     
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RoHS - XON
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Logic Family
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74LVT16543A 3.3 V 16-bit registered transceiver 3-state Rev. 4 1 April 2021 Product data sheet 1. General description The 74LVT16543A is a 16-bit registered transceiver with 3-state outputs. The device can be used as two 8-bit transceivers or one 16-bit transceiver. Data flow in each direction is controlled by intput enable (nEAB and nEBA), latch enable (nLEAB and nLEBA), and output enable (nOEAB and nOEBA) inputs. For A to B data flow, the device operates in the transparent mode when (nEAB) and (nLEAB) are LOW. A subsequent LOW-to-HIGH transition of the nLEAB input latches the data and the outputs no longer change with the inputs. A HIGH on either nEAB or nOEAB causes the outputs to assume a high-impedance OFF-state. Control of data flow from B to A is similar, but using the nEBA, nLEBA, and nOEBA inputs. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs 2. Features and benefits 16-bit universal bus interface 3-state buffers Wide supply voltage range from 2.7 to 3.6 V Input and output interface capability to systems at 5 V supply Overvoltage tolerant inputs to 5.5 V Direct interface with TTL levels BiCMOS high speed and output drive Output capability: +64 mA/-32 mA Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs Live insertion/extraction permitted Power-up 3-state Power-up reset No bus current loading when output is tied to 5 V bus I circuitry provides partial Power-down mode operation OFF Latch-up performance exceeds 500 mA per JESD 78 Class II Level B Complies with JEDEC standards JESD8C (2.7 V to 3.6 V) ESD protection: HBM: JESD22-A114F exceeds 2000 V MM: JESD22-A115-A exceeds 200 V 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVT16543ADGG -40 C to +85 C TSSOP56 plastic thin shrink small outline package 56 leads SOT364-1 body width 6.1 mmNexperia 74LVT16543A 3.3 V 16-bit registered transceiver 3-state 4. Functional diagram 1A0 1B0 2A0 2B0 5 52 15 42 1A1 1B1 2A1 2B1 6 51 16 41 1A2 1B2 2A2 2B2 8 49 17 40 1A3 1B3 2A3 2B3 9 48 19 38 1A4 1B4 2A4 2B4 10 47 20 37 1A5 1B5 2A5 2B5 12 45 21 36 1A6 1B6 2A6 2B6 13 44 23 34 1A7 1B7 2A7 2B7 14 43 24 33 1OEAB 2OEAB 1 28 1OEBA 2OEBA 56 29 1EAB 2EAB 3 26 1EBA 2EBA 54 31 1LEAB 2LEAB 2 27 1LEBA 2LEBA 55 30 aaa-027924 Fig. 1. Logic symbol 56 1EN3 (BA) 29 7EN9 (BA) 54 G1 31 G7 55 1C5 30 7C11 1 2EN4 (AB) 28 8EN10 (AB) 3 G2 26 G8 2 2C6 27 8C12 5 52 15 42 3 5D 9 11D 6D 4 12D 10 6 16 51 41 8 17 49 40 9 19 48 38 10 20 47 37 12 21 45 36 13 23 44 34 14 24 43 33 aaa-027925 Fig. 2. IEC logic symbol 74LVT16543A All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 4 1 April 2021 2 / 15

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Nexperia
NEXPERIA USA INC
Nexperia USA Inc.

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