HEF4014BT-Q100J Nexperia

HEF4014B-Q100 8-bit static shift register Rev. 3 24 November 2021 Product data sheet 1. General description The HEF4014B-Q100 is an 8-bit shift register with synchronous parallel enable. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of V . DD This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 3) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 3) Specified from -40 C to +85 C Wide supply voltage range from 3.0 V to 15.0 V CMOS low power dissipation High noise immunity Tolerant of slow clock rise and fall times Fully static operation 5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics Complies with JEDEC standard JESD 13-B ESD protection: MIL-STD-833, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) 3. Applications Parallel-to-serial converter Serial data queueing General-purpose register 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version HEF4014BT-Q100 -40 C to +85 C SO16 plastic small outline package 16 leads SOT109-1 body width 3.9 mmNexperia HEF4014B-Q100 8-bit static shift register 5. Functional diagram 7 6 5 4 13 14 15 1 D0 D1 D2 D3 D4 D5 D6 D7 9 PE 11 DS 0D 1D 2D 3D 4D 5D 6D 7D 10 CP CP SHIFT REGISTER 8 BITS Q5 Q6 Q7 2 12 3 001aae556 Fig. 1. Functional diagram PE D0 D5 D6 D7 D Q D Q D Q D Q FF 0 FF 5 FF 6 FF 7 DS CP CP CP CP CP Q5 Q6 Q7 001aae558 Fig. 2. Logic diagram HEF4014B Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 3 24 November 2021 2 / 12