PPA MKP with double side met. current carriers axial terminals snubber high pulse applications high current high frequency Main applications Maximum peak current (Ipeak) Snubber capacitor for energy conversion and control in power Refer to article table. Max. non repetitive Ipk = 1,5 x Ipeak semiconductor circuits, protection circuits in SMPSs, induction Dissipation factor (DF), max. heaters, high voltage, high current and high pulse applications -4 tg x10 , measured at 25 5C, 1 kHz Dielectric Cn 0.047 F 0.047 F < Cn 1 F Cn > 1 F Polypropylene 6 5 6 Electrodes Vacuum deposited metal layers Insulation resistance (R ) INS Coating 30000s but need not exceed 30G (typical value), after 1 minute of UL 510 / CSA TIL I-26 polyester tape wrapping UL 94 V-0 resin end fill. electrification at 100Vdc (25 5C) Flame retardant execution Test voltage between terminals (Ut) Construction 1,6xUr (DC) applied for 10s / 2xUr (DC) applied for 2s, at 255C Extended double side metallized carrier film with internal series Test voltage between terminals and case (Utc) connection and metallized film (refer to General Technical 3kV 5060Hz applied for 60s at 25 5C Information) Damp heat test (steady state) Terminals Test conditions: Tinned copper wire (lead free) Temperature = +40 2C Degree of protection Relative humidity =93 2% IP00 Test duration = 56 days Performance: Installation Capacitance change 2% Whatever position assuring correct heat dissipation. Arrangement of DF change 0.0010 at 1kHz many components with surfaces in contact not admitted suggested R 50% of initial limit value minimum distance between side by side elements 1/12 of the INS diameter size Typical capacitance change versus operating time -3% after 30000 hours at Urms or after 100000 hours at Ur Reference standard IEC 61071, IEC 60068, RoHS compliant Life expectancy 100000 hours (Ur) 30000 hours (Urms) Climatic category 40/85/56 (IEC 60068/1), GPD (DIN40040) Failure quota Please refer also to paragraph C10 (humid ambient) of the General 9 300/10 component hours Technical Information Resistance to soldering heat test Operating temperature range (case) Test conditions: -40...+85C Solder bath temperature= +2605C Max. permissible ambient temperature Dipping time (with heat screen)= 101s +70C (operation at rated power, current, voltage and natural cooling) Performance: Capacitance change 1% Nominal Capacitance (Cn) F DF change 0.0010 at 1kHz 0,0047F to 6,8F. Refer to article table R 50% of initial limit value INS Capacitance tolerance (at 1kHz) 10% (code=K), 5% (code=J) and 20% (code=M). Other tolerances upon request Capacitance temperature coefficient Refer to General Technical Information Long term stability (at 1kHz) Capacitance variation 1% after a period of 2 years at standard environmental conditions Rated voltage (Ur) (Vdc) at 85C 700, 850, 1000, 1200, 1500, 2000, 2500, 3000 Vdc Non recurrent surge voltage (Upk) at 85C 1100, 1300, 1550, 1750, 2200, 2600, 3300, 4000 Vdc Self inductance 1nH/mm of capacitor and leads length used for connection Maximum pulse rise time V/s Refer to article table 22.1 Ed. 04 Rev. 00 09.2018PPA MKP with double side met. current carriers axial terminals snubber high pulse applications high current high frequency PPA article table (different values available upon request) (2) (3) (1) Voltage at +85C Cn Dimensions (mm) du/dt Ipeak Irms ESR ICEL CODE (4) Ur (Vdc) Urms (Vac) Upk (Vdc) F D L d V/s A A m - 700 420 1100 0,1 10 27 0,8 950 95 3,5 13 PPA1703100*G 700 420 1100 0,15 11,5 27 0,8 950 142,5 4,5 9,4 PPA1703150*G 700 420 1100 0,22 13,5 27 0,8 950 209 6 7,1 PPA1703220*G 700 420 1100 0,22 11,5 32 0,8 700 154 5,5 8 PPA1703220*J 700 420 1100 0,33 15,5 27 0,8 950 313,5 7 5,4 PPA1703330*G 700 420 1100 0,33 13,5 32 0,8 700 231 7 6 PPA1703330*J 700 420 1100 0,47 16 32 1 700 329 8 4,7 PPA1703470*J 700 420 1100 0,68 19,5 32 1 700 476 10,5 3,9 PPA1703680*J 700 420 1100 0,68 16 44 1 475 323 10 4,4 PPA1703680*N 700 420 1100 1 24 32 1,2 700 700 12,5 3,2 PPA1704100*J 700 420 1100 1 19 44 1 475 475 10,5 3,9 PPA1704100*N 700 420 1100 1,5 23,5 44 1,2 475 712,5 14 3,3 PPA1704150*N 700 420 1100 2 27 44 1,2 475 950 14 3 PPA1704200*N 700 420 1100 2,2 28 44 1,2 475 1045 14 2,9 PPA1704220*N 700 420 1100 2,2 25 53 1,2 350 770 14 3,8 PPA1704220*R 700 420 1100 2,2 23,5 57 1,2 300 660 14 4,2 PPA1704220*S 700 420 1100 2,5 30 44 1,2 475 1187,5 14 2,8 PPA1704250*N 700 420 1100 2,5 27 53 1,2 350 875 14 3,5 PPA1704250*R 700 420 1100 2,5 25,5 57 1,2 300 750 14 3,9 PPA1704250*S 700 420 1100 3 33 44 1,2 475 1425 14 2,6 PPA1704300*N 700 420 1100 3 29 53 1,2 350 1050 14 3,2 PPA1704300*R 700 420 1100 3 27,5 57 1,2 300 900 14 3,6 PPA1704300*S 700 420 1100 3,3 34 44 1,2 475 4567,5 14 2,5 PPA1704330*N 700 420 1100 3,3 30 53 1,2 350 1155 14 3,1 PPA1704330*R 700 420 1100 3,3 28,5 57 1,2 300 990 14 3,5 PPA1704330*S 700 420 1100 4 32,5 53 1,2 350 1400 14 2,8 PPA1704400*R 700 420 1100 4 31 57 1,2 300 1200 14 3,1 PPA1704400*S 700 420 1100 4,7 35,5 53 1,2 350 1645 14 2,6 PPA1704470*R 700 420 1100 4,7 33,5 57 1,2 300 1410 14 2,9 PPA1704470*S 700 420 1100 5,6 39 53 1,2 350 1960 14 2,3 PPA1704560*R 700 420 1100 5,6 36,5 57 1,2 300 1680 14 2,6 PPA1704560*S 700 420 1100 6,8 40 57 1,2 300 2040 14 2,4 PPA1704680*S 850 500 1300 0,068 9,5 27 0,8 1200 81,6 3,5 13,9 PPA1852680*G 850 500 1300 0,1 11 27 0,8 1200 120 4,5 10,4 PPA1853100*G 850 500 1300 0,1 9 32 0,8 900 90 4 11,5 PPA1853100*J 850 500 1300 0,15 13 27 0,8 1200 180 5,5 7,6 PPA1853150*G 850 500 1300 0,15 11 32 0,8 900 135 5 8,6 PPA1853150*J 850 500 1300 0,22 15,5 27 0,8 1200 264 7 6,1 PPA1853220*G 850 500 1300 0,22 13 32 0,8 900 198 6,5 6,6 PPA1853220*J (1) Change the * symbol with the needed capacitance tolerance code: J=5%, K=10%, M=20% (2) Maximum values at 100kHz, +70C, C tol. 10% (for wider C tolerance, ESR variation must be taken in consideration) (3) Typical values at 100kHz (for operating frequencies far from the reference, ESR variation and related power dissipation variation must be taken in consideration) (4) Not suitable for across the line application 22.2 Ed. 04 Rev. 00 09.2018