74ALVCH16501
18-bit universal bus transceiver; 3-state
Rev. 5 10 July 2012 Product data sheet
1. General description
The 74ALVCH16501 is an 18-bit transceiver featuring non-inverting 3-state bus
compatible outputs in both send and receive directions. Data flow in each direction is
controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock
(CPAB and CPBA) inputs. For A-to-B data flow, the device operates in the transparent
mode when LEAB is HIGH. When LEAB is LOW, the A data is latched if CPAB is held at a
HIGH or LOW logic level. If LEAB is LOW, the A-bus data is stored in the latch/flip-flop on
the LOW-to HIGH transition of CPAB. When OEAB is HIGH, the outputs are active. When
OEAB is LOW, the outputs are in the high-impedance state.
Data flow for B-to-A is similar to that of A-to-B but uses OEBA, LEBA and CPBA. The
output enables are complimentary (OEAB is active HIGH, and OEBA is active LOW.
To ensure the high-impedance state during power-up or power-down, OEBA should be
tied to V through a pull-up resistor and OEAB should be tied to GND through a
CC
pull-down resistor; the minimum value of the resistor is determined by the
current-sinking/current-sourcing capability of the driver.
Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic
level.
2. Features and benefits
Wide supply voltage range from 1.2 V to 3.6 V
Complies with JEDEC standard JESD8-B
CMOS low power consumption
Direct interface with TTL levels
Current drive 24 mA at V = 3.0 V
CC
Universal bus transceiver with D-type latches and D-type flip-flops capable of
operating in transparent, latched or clocked mode
All inputs have bus hold circuitry
Output drive capability 50 transmission lines at 85 C
3-state non-inverting outputs for bus-oriented applications74ALVCH16501
Nexperia
18-bit universal bus transceiver; 3-state
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74ALVCH16501DGG 40 C to +85 C TSSOP56 plastic thin shrink small outline package; SOT364-1
56 leads; body width 6.1 mm
74ALVCH16501DL 40 C to +85 C SSOP56 plastic shrink small outline package; 56 leads; SOT371-1
body width 7.5 mm
4. Functional diagram
1
OEAB EN1
55
CPAB 2C3
2
LEAB C3
G2
27
OEBA EN4
30
CPBA 5C6
A0 B0
3 54
28
LEBA C6
A1 B1
5 52
G5
A2 B2
6 51
A3 B3
3 54
8 49
A0 3D 1 1 B0
A4 B4
9 48
41 6D
A5 B5
5 52
10 47
A1 B1
A6 B6
6 51
12 45
A2 B2
A7 B7
8 49
13 44
A3 B3
A8 B8
9 48
14 43
A4 B4
A9 B9
10 47
15 42
A5 B5
A10 B10
12 45
16 41
A6 B6
A11 B11
13 44
17 40
A7 B7
A12 B12
14 43
19 38
A8 B8
A13 B13
15 42
20 37
A9 B9
A14 B14
16 41
21 36
A10 B10
A15 B15
17 40
23 34
A11 B11
A16 B16
19 38
24 33
A12 B12
A17 B17
20 37
26 31
A13 B13
21 36
A14 B14
23 34
OEAB OEBA
127 A15 B15
24 33
LEAB LEBA
228 A16 B16
26 31
CPAB CPBA
55 30 A17 B17
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001aal717
Fig 1. Logic symbol Fig 2. IEC logic symbol
74ALVCH16501 All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet Rev. 5 10 July 2012 2 of 18