74LVC2G53 2-channel analog multiplexer/demultiplexer Rev. 9 5 April 2013 Product data sheet 1. General description The 74LVC2G53 is a low-power, low-voltage, high-speed, Si-gate CMOS device. The 74LVC2G53 provides one analog multiplexer/demultiplexer with a digital select input (S), two independent inputs/outputs (Y0 and Y1), a common input/output (Z) and an active LOW enable input (E). When pin E is HIGH, the switch is turned off. Schmitt trigger action at the select and enable inputs makes the circuit tolerant of slower input rise and fall times across the entire V range from 1.65 V to 5.5 V. CC 2. Features and benefits Wide supply voltage range from 1.65 V to 5.5 V Very low ON resistance: 7.5 (typical) at V =2.7 V CC 6.5 (typical) at V =3.3 V CC 6 (typical) at V =5V CC Switch current capability of 32 mA High noise immunity CMOS low-power consumption TTL interface compatibility at 3.3 V Latch-up performance meets requirements of JESD 78 Class I ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101E exceeds 1000 V Control inputs accept voltages up to 5 V Multiple package options Specified from 40 C to +85 C and from 40 C to +125 C74LVC2G53 NXP Semiconductors 2-channel analog multiplexer/demultiplexer 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC2G53DP 40 Cto +125 C TSSOP8 plastic thin shrink small outline package 8 leads SOT505-2 body width 3 mm lead length 0.5 mm 74LVC2G53DC 40 Cto +125 C VSSOP8 plastic very thin shrink small outline package 8 leads SOT765-1 body width 2.3 mm 74LVC2G53GT 40 Cto +125 C XSON8 plastic extremely thin small outline package no leads SOT833-1 8 terminals body 1 1.95 0.5 mm 74LVC2G53GF 40 C to +125 C XSON8 extremely thin small outline package no leads SOT1089 8 terminals body 1.35 1 0.5 mm 74LVC2G53GD 40 Cto +125 C XSON8 plastic extremely thin small outline package no leads SOT996-2 8 terminals body 3 2 0.5 mm 74LVC2G53GM 40 C to +125 C XQFN8 plastic, extremely thin quad flat package no leads SOT902-2 8 terminals body 1.6 1.6 0.5 mm 74LVC2G53GN 40 C to +125 C XSON8 extremely thin small outline package no leads SOT1116 8 terminals body 1.2 1.0 0.35 mm 74LVC2G53GS 40 C to +125 C XSON8 extremely thin small outline package no leads SOT1203 8 terminals body 1.35 1.0 0.35 mm 4. Marking Table 2. Marking codes 1 Type number Marking code 74LVC2G53DC V53 74LVC2G53DP V53 74LVC2G53GT V53 74LVC2G53GF V3 74LVC2G53GD V53 74LVC2G53GM V53 74LVC2G53GN V3 74LVC2G53GS V3 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram Y1 S Y0 Z E 001aah795 Fig 1. Logic symbol 74LVC2G53 All information provided in this document is subject to legal disclaimers. NXP B.V. 2013. All rights reserved. Product data sheet Rev. 9 5 April 2013 2 of 28