MC33PF3000A3ES

NXP Semiconductors Document Number: PF3000 Rev. 9.0, 8/2017 Data sheet: Advance Information Power management integrated PF3000 circuit (PMIC) for i.MX 7 & i.MX 6SL/ SX/UL The PF3000 is a power management integrated circuit (PMIC) designed POWER MANAGEMENT specifically for use with the NXP i.MX 7 and i.MX 6SL/SX/UL application processors. With up to four buck converters, six linear regulators, RTC supply, and coin-cell charger, the PF3000 can provide power for a complete system, including applications processors, memory, and system peripherals. This device is powered by SMARTMOS technology. Features: EP SUFFIX ES SUFFIX Four adjustable high efficiency buck regulators: 1.75 A, 1.5 A, 1.25 A, 1.0 A 98ASA00719D 98ASA00933D Selectable modes: PWM, PFM, APS 48 QFN 7.0 X 7.0 48 QFN 7.0 X 7.0 5.0 V, 600 mA boost regulator with PFM or auto mode Applications: Six adjustable general purpose linear regulators Tablets Input voltage range: 2.8 V to 4.5 V or 3.7 V to 5.5 V eReaders OTP (One Time Programmable) memory for device configuration Wearables Programmable start-up sequence and timing POS terminals Selectable output voltage, frequency, soft start Industrial control 2 I C control Medical monitoring Coin cell charger and always ON RTC supply Home automation DDR reference voltage Home security/energy management -40 C to +125 C operating junction temperature PF3000 i.MX VREFDDR DDR MEMORY Switching regulators DDR Memory INTERFACE SW3 0.90 to 1.65 V 1.5 A Processor SW1A 0.7 to 1.425 V, 1.8V, 3.3V 1.0 A ARM Core SW1B Processor SOC 0.70 to 1.475 V 1.75 A External AMP SW2 Microphones 1.50 to 1.85 V 1.25 A SATA - FLASH Speakers or 2.5 to 3.3 V 1.25 A SD-MMC/ SATA NAND - NOR SWBST NAND Mem. HDD Interfaces 5.00 to 5.15 V 0.6 A Audio Codec RESETBMCU PWRON STANDBY Parallel control/GPIOS SD VSEL INTB Linear 2 2 I C Sensors I C regulators VLDO1 Camera 1.8 to 3.3 V 100 mA Camera GPS VLDO2 0.80 to 1.55 V 250 mA MIPI WAM VCC SD uPCIe GPS/MIPI 1.80 to 1.85 V 100 mA or 2.85 to 3.3 V 100 mA V33 HDMI LDVS Display 2.85 - 3.3 V 350 mA VLDO3 USB 1.8 - 3.3 V 100 mA Ethernet VLDO4 1.8 - 3.3 V 350 mA CAN Main Supply COINCELL 2.8 5.5 V Front USB Rear Seat Rear USB Cluster/HUD POD Infotaiment POD Figure 1. PF3000 Simplified Application Diagram * This document contains certain information on a new product. Specifications and information herein are subject to change without notice. NXP B.V. 2017. Li CELL ChargerTable of Contents 1 Orderable parts 3 2 General description . 4 3 Internal block diagram . 6 4 Pin connections 7 4.1 Pinout diagram . 7 4.2 Pin definitions 8 5 General product characteristics . 10 5.1 Absolute maximum ratings . 10 5.2 Thermal Characteristics . 11 5.3 Current consumption 12 5.4 Electrical characteristics . 13 6 Functional description and application information 29 2.1 Features 4 6 Functional description and application information 29 6.1 Introduction . 29 6.2 Power generation 29 6.3 Functional description . 31 6.3.1 Control logic and interface signals 31 6.3.2 One-time-programmable memory . 32 6.3.4 16 MHz and 32 kHz clocks 36 6.3.5 Optional front-end input LDO regulator . 37 6.3.6 Internal core voltages 38 6.3.7 VREFDDR voltage reference 38 6.3.8 Buck regulators . 39 6.3.9 Boost regulator . 46 6.3.10 LDO Regulators Description . 48 6.3.11 VSNVS LDO/switch . 50 6.4 Power dissipation 53 6.5 Modes of operation . 54 6.5.1 State diagram .54 6.5.2 State machine flow summary .57 6.5.3 Performance characteristics curves 58 6.6 Control Interface I2C block description 61 6.6.1 I2C device ID .61 6.6.2 I2C operation .62 6.6.3 Interrupt handling 63 6.6.4 Interrupt bit summary .63 6.6.5 Specific registers .68 6.6.6 Register map .102 7 Typical applications . 110 7.1 Application diagram 110 8 Bill of materials . 111 9 Thermal information . 114 9.1 Rating data 114 9.2 Estimation of junction temperature 114 10 Packaging . 115 10.1Packaging dimensions . 115 11 Revision history 121 PF3000 2 NXP Semiconductors