Document Number: K10P144M100SF2V2 Freescale Semiconductor Rev. 3, 6/2013 Data Sheet: Technical Data K10P144M100SF2V2 K10 Sub-Family Supports the following: MK10DX128VLQ10, MK10DX128VMD10, MK10DX256VLQ10, MK10DX256VMD10, MK10DN512VLQ10, MK10DN512VMD10 Features Security and integrity modules Operating Characteristics Hardware CRC module to support fast cyclic Voltage range: 1.71 to 3.6 V redundancy checks Flash write voltage range: 1.71 to 3.6 V 128-bit unique identification (ID) number per chip Temperature range (ambient): -40 to 105C Human-machine interface Performance Low-power hardware touch sensor interface (TSI) Up to 100 MHz ARM Cortex-M4 core with DSP General-purpose input/output instructions delivering 1.25 Dhrystone MIPS per Analog modules MHz Two 16-bit SAR ADCs Memories and memory interfaces Programmable gain amplifier (PGA) (up to x64) Up to 512 KB program flash memory on non- integrated into each ADC FlexMemory devices Two 12-bit DACs Up to 256 KB program flash memory on Two transimpedance amplifiers FlexMemory devices Three analog comparators (CMP) containing a 6-bit Up to 256 KB FlexNVM on FlexMemory devices DAC and programmable reference input 4 KB FlexRAM on FlexMemory devices Voltage reference Up to 128 KB RAM Timers Serial programming interface (EzPort) Programmable delay block FlexBus external bus interface Eight-channel motor control/general purpose/PWM Clocks timer 3 to 32 MHz crystal oscillator Two 2-channel quadrature decoder/general purpose 32 kHz crystal oscillator timers Multi-purpose clock generator Periodic interrupt timers 16-bit low-power timer System peripherals Carrier modulator transmitter Multiple low-power modes to provide power Real-time clock optimization based on application requirements Memory protection unit with multi-master Communication interfaces protection Two Controller Area Network (CAN) modules 16-channel DMA controller, supporting up to 63 Three SPI modules request sources Two I2C modules External watchdog monitor Six UART modules Software watchdog Secure Digital host controller (SDHC) Low-leakage wakeup unit I2S module Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. 20122013 Freescale Semiconductor, Inc. This page intentionally blank. K10 Sub-Family Data Sheet, Rev. 3, 6/2013. 2 Freescale Semiconductor, Inc.