PH6030BL,115

PH6030AL N-channel TrenchMOS logic level FET Rev. 05 12 January 2010 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product is designed and qualified for use in computing and consumer applications. 1.2 Features and benefits High efficiency due to low switching Suitable for logic level gate drive and conduction losses sources 1.3 Applications Consumer applications Notebook Voltage Regulator Module (VRM) Desktop Voltage Regulator Module (VRM) 1.4 Quick reference data Table 1. Quick reference Symbol Parameter Conditions Min Typ Max Unit V drain-source voltage T 25 C T 175 C - - 30 V DS j j I drain current T =25C V =10V --79 A D mb GS see Figure 1 P total power T = 25 C see Figure 2 --55 W tot mb dissipation Dynamic characteristics Q gate-drain charge V = 4.5 V I =10A -3.08- nC GD GS D V = 12 V see Figure 14 DS Q total gate charge - 11 - nC G(tot) and 15 Static characteristics R drain-source V = 4.5 V I =15A - 6.18 7.87 m DSon GS D on-state resistance T =25C j V =10V I =15A -4.2 6 m GS D T =25C jNXP Semiconductors PH6030AL N-channel TrenchMOS logic level FET 2. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline Graphic symbol 1S source mb D 2S source 3S source G 4G gate mbb076 S mb D mounting base connected to 1234 drain SOT669 (LFPAK) 3. Ordering information Table 3. Ordering information Type number Package Name Description Version PH6030AL LFPAK plastic single-ended surface-mounted package (LFPAK) 4 leads SOT669 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit V drain-source voltage T 25 C T 175 C - 30 V DS j j V drain-gate voltage T 25 C T 175 C R =20k -30 V DGR j j GS V gate-source voltage -20 20 V GS I drain current V =10V T = 100 C see Figure 1 -56 A D GS mb V =10V T =25C see Figure 1 -79 A GS mb I peak drain current t 10 s pulsed T =25C see Figure 3 -292 A DM p mb P total power dissipation T =25C see Figure 2 -55 W tot mb T storage temperature -55 175 C stg T junction temperature -55 175 C j Source-drain diode I source current T =25C - 73 A S mb I peak source current t 10 s pulsed T =25C - 292 A SM p mb Avalanche ruggedness E non-repetitive V =10V T =25C I =73A V 30 V -26 mJ DS(AL)S GS j(init) D sup drain-source avalanche R =50 unclamped GS energy PH6030AL 5 All information provided in this document is subject to legal disclaimers. NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 12 January 2010 2 of 14