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This literature is subject to all applicable copyright laws and is not for resale in any manner.74LVT573, 74LVTH573 Low Voltage Octal Transparent Latch with 3-STATE Outputs January 2008 74LVT573, 74LVTH573 Low Voltage Octal Transparent Latch with 3-STATE Outputs Features General Description Input and output interface capability to systems at The LVT573 and LVTH573 consist of eight latches 5V V with 3-STATE outputs for bus organized system applica- CC tions. The latches appear transparent to the data when Bushold data inputs eliminate the need for external Latch Enable (LE) is HIGH. When LE is low, the data pull-up resistors to hold unused inputs (74LVTH573), satisfying the input timing requirements is latched. Data also available without bushold feature (74LVT573) appears on the bus when the Output Enable (OE) is Live insertion/extraction permitted LOW. When OE is HIGH, the bus output is in the high Power Up/Down high impedance provides glitch-free impedance state. bus loading The LVTH573 data inputs include bushold, eliminating Outputs source/sink 32mA/+64mA the need for external pull-up resistors to hold unused Functionally compatible with the 74 series 573 inputs. Latch-up performance exceeds 500mA These octal latches are designed for low-voltage (3.3V) ESD performance: V applications, but with the capability to provide a TTL CC Human-body model > 2000V interface to a 5V environment. The LVT573 and Machine model > 200V LVTH573 are fabricated with an advanced BiCMOS Charged-device model > 1000V technology to achieve high speed operation similar to 5V ABT while maintaining a low power dissipation. Ordering Information Package Order Number Number Package Description 74LVT573WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74LVT573SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVT573MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide 74LVT573MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74LVTH573WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74LVTH573SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVTH573MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide 74LVTH573MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Device also available in Tape and Reel. Specify by appending suffix letter X to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. 1999 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LVT573, 74LVTH573 Rev. 1.7.0