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This literature is subject to all applicable copyright laws and is not for resale in any manner.74VHC132 Quad 2-Input NAND Schmitt Trigger December 2007 74VHC132 Quad 2-Input NAND Schmitt Trigger Features General Description High Speed: t = 3.9ns (Typ.) at V = 5V The VHC132 is an advanced high speed CMOS 2-input PD CC NAND Schmitt Trigger Gate fabricated with silicon gate Power down protection is provided on all inputs CMOS technology. It achieves the high-speed operation Low power dissipation: I = 2A (Max.) at T = 25C CC A similar to Bipolar Schottky TTL while maintaining the Low noise: V = 0.8V (Max.) OLP CMOS low power dissipation. Pin configuration and Pin and function compatible with 74HC132 function are the same as the VHC00 but the inputs have hysteresis between the positive-going and negative- going input thresholds, which are capable of transform- ing slowly changing input signals into sharply defined, jitter-free output signals. Thus greater noise margin then conventional gates is provided. An input protection circuit ensures that 0V to 7V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5V to 3V systems and two supply systems such as battery backup. This circuit prevents device destruction due to mismatched supply and input voltages. Ordering Information Package Order Number Number Package Description 74VHC132M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74VHC132SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHC132MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Device also available in Tape and Reel. Specify by appending suffix letter X to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. 1995 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC132 Rev. 1.5.0