Product Information

CAT93C56VI

CAT93C56VI electronic component of ON Semiconductor

Datasheet
SERIAL EEPROM, 2KBIT, 2MHZ, SOIC-8

Manufacturer: ON Semiconductor
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 0.7314 ea
Line Total: USD 0.73

0 - Global Stock
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
0 - WHS 1


Ships to you between Fri. 10 May to Thu. 16 May

MOQ : 5
Multiples : 1

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CAT93C56VI
ON Semiconductor

5 : USD 0.4903
10 : USD 0.4351
100 : USD 0.3904

     
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E E L R E F A N D CAT93C56/57 (Die Rev. E) 2K-Bit Microwire Serial EEPROM TM FEATURES High speed operation: 1MHz Power-up inadvertant write protection Low power CMOS technology 1,000,000 Program/erase cycles 1.8 to 6.0 volt operation 100 year data retention Selectable x8 or x16 memory organization Commercial, industrial and automotive temperature ranges Self-timed write cycle with auto-clear Sequential read Hardware and software write protection Green package option available DESCRIPTION using Catalysts advanced CMOS EEPROM floating The CAT93C56/57 are 2K-bit Serial EEPROM memory gate technology. The devices are designed to endure devices which are configured as either registers of 16 1,000,000 program/erase cycles and has a data reten- bits (ORG pin at V ) or 8 bits (ORG pin at GND). Each CC tion of 100 years. The devices are available in 8-pin DIP, register can be written (or read) serially by using the 8-pin SOIC, 8-pin TSSOP and 8-pad TDFN packages. DI (or DO) pin. The CAT93C56/57 are manufactured PIN CONFIGURATION FUNCTIONAL SYMBOL V CC DIP Package (P, L) SOIC Package (J,W) 1 8 1 8 CS V ORG NC CC ORG DI 2 7 2 7 SK NC V GND CC 3 6 3 6 DI ORG CS DO CS DO 4 5 4 5 DO GND SK DI SK NC SOIC Package (S,V) SOIC Package (K,X) 1 8 1 8 CS V CS V CC CC GND 2 7 2 7 SK SK NC NC 3 6 3 6 DI ORG DI ORG PIN FUNCTIONS 4 5 4 5 DO GND DO GND Pin Name Function CS Chip Select TSSOP Package (U,Y) SK Clock Input 1 8 CS V CC DI Serial Data Input 2 7 SK NC 3 6 DO Serial Data Output DI ORG 4 5 DO GND V +1.8 to 6.0V Power Supply CC GND Ground TDFN Package (RD4, ZD4) ORG Memory Organization V CC 8 1 CS NC No Connection NC 7 2 SK Note: When the ORG pin is connected to VCC, the x16 organiza- ORG 6 3 DI tion is selected. When it is connected to ground, the x8 pin is GND 5 4 DO selected. If the ORG pin is left unconnected, then an internal pullup device will select the x16 organization. Bottom View 2004 by Catalyst Semiconductor, Inc. Doc. No. 1088, Rev. L Characteristics subject to change without notice. E F G R O E L A E HCAT93C56/57 ABSOLUTE MAXIMUM RATINGS* *COMMENT Temperature Under Bias .................. -55C to +125C Stresses above those listed under Absolute Maximum Storage Temperature........................ -65C to +150C Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of Voltage on any Pin with (1) the device at these or any other conditions outside of those Respect to Ground ............. -2.0V to +V +2.0V CC listed in the operational sections of this specification is not V with Respect to Ground ................ -2.0V to +7.0V CC implied. Exposure to any absolute maximum rating for Package Power Dissipation extended periods may affect device performance and Capability (T = 25C) ................................... 1.0W A reliability. Lead Soldering Temperature (10 secs) ............ 300C (2) Output Short Circuit Current ........................ 100 mA RELIABILITY CHARACTERISTICS SymbolParameter Reference Test Method Min Typ Max Units (3) N Endurance MIL-STD-883, Test Method 1033 1,000,000 Cycles/Byte END (3) TDR Data Retention MIL-STD-883, Test Method 1008 100 Years (3) V ESD Susceptibility MIL-STD-883, Test Method 3015 2000 Volts ZAP (3)(4) I Latch-Up JEDEC Standard 17 100 mA LTH D.C. OPERATING CHARACTERISTICS V = +1.8V to +6.0V, unless otherwise specified. CC SymbolParameter Test Conditions Min Typ Max Units I Power Supply Current f = 1MHz 3 mA CC1 SK (Write) V = 5.0V CC I Power Supply Current f = 1MHz 500 A CC2 SK (Read) V = 5.0V CC I Power Supply Current CS = 0V 10 A SB1 (Standby) (x8 Mode) ORG=GND I Power Supply Current CS=0V 0 10 A SB2 (Standby) (x16Mode) ORG=Float or V CC I Input Leakage Current V = 0V to V 1 A LI IN CC I Output Leakage Current V = 0V to V,1 A LO OUT CC (Including ORG pin) CS = 0V V Input Low Voltage 4.5V V < 5.5V -0.1 0.8 V IL1 CC V Input High Voltage 4.5V V < 5.5V 2 V + 1 V IH1 CC CC V Input Low Voltage 1.8V V < 4.5V 0 V x 0.2 V IL2 CC CC V Input High Voltage 1.8V V < 4.5V V x 0.7 V +1 V IH2 CC CC CC V Output Low Voltage 4.5V V < 5.5V 0.4 V OL1 CC I = 2.1mA OL V Output High Voltage 4.5V V < 5.5V 2.4 V OH1 CC I = -400 A OH V Output Low Voltage 1.8V V < 4.5V 0.2 V OL2 CC I = 1mA OL V Output High Voltage 1.8V V < 4.5V V - 0.2 V OH2 CC CC I = -100 A OH Note: (1) The minimum DC input voltage is 0.5V. During transitions, inputs may undershoot to 2.0V for periods of less than 20 ns. Maximum DC voltage on output pins is V +0.5V, which may overshoot to V +2.0V for periods of less than 20 ns. CC CC (2) Output shorted for no more than one second. No more than one output shorted at a time. (3) This parameter is tested initially and after a design or process change that affects the parameter. (4) Latch-up protection is provided for stresses up to 100 mA on address and data pins from 1V to V +1V. CC Doc. No. 1088, Rev. L 2

Tariff Desc

8542.32.00 32 No ..CMOS and MOS Read Only Memory and Programmable Read Only Memory whether erasable or non-erasable (for example, flash memory, EPROM, E2PROM, EAPROM, NOVRAM, ROM and PROM)
Aptina / ON Semiconductor
FAIRCHILD
FAIRCHILD (ON SEMICONDUCTOR)
Fairchild Semiconductor
FS8
FSC
ON
ON SEMI
ON Semicon
ON SEMICONDUCTOR
ON SEMICONDUCTOR (FAIRCHILD)
ON Semiconductor / Fairchild
ON4
ON5
onsemi
ON-SEMI
onsemi / Fairchild
OOF
Xsens / Fairchild

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