DATA SHEET www.onsemi.com Fixed-Output Synchronous TinyBoost Regulator WLCSP9 CASE 567QW FAN48685 Description MARKING DIAGRAM The FAN48685 is a lowpower boost regulator designed to provide a minimum voltageregulated rail from a standard singlecell LiIon 1 battery and advanced battery chemistries. Even below the minimum LD system battery voltage, the device maintains the output voltage AWLYYWW regulation for an output load current of 800 mA. The combination of builtin power transistors, synchronous rectification, and low supply current suit the FAN48685 for batterypowered applications. The FAN48685 is available in a 9 bump, 0.4 mm pitch, LD = Specific Device Code A = Assembly Location WaferLevel ChipScale Package (WLCSP). WL = Wafer Lot YY = Year Features WW = Work Week Input Voltage Range: 2.5 V to 5.5 V = PbFree Package 800 mA Max. Load Capability (Note: Microdot may be in either location) Forced PassThrough Mode Three Output Voltage Programmability (3.6 V / 5.0 V / 5.45 V) via MODE Pins 9Bump, 0.4 mm Pitch WLCSP Four External Components: 0603 Inductor, 0402 Case Size Input, 0402 2 x Output Capacitors This is a PbFree Device Applications NFC Module Power SW L PVIN VOUT FAN48685 CIN COUT MODE 1 MODE 0 PGND Figure 1. Typical Application ORDERING INFORMATION Part Number Operating Temperature Range Package Packing Method Device Marking FAN48685UC08X 40C to 85C 9Bump, 0.4 mm Pitch, Tape & Reel LD WLCSP Package Semiconductor Components Industries, LLC, 2018 1 Publication Order Number: August, 2021 Rev. 1 FAN48685/DFAN48685 Recommended External Components Table 1. RECOMMENDED COMPONENTS Component Description Vendor Parameter Typical Value Unit L 470 nH 0603 DFE18SANR47ME L 0.47 H (1.6 mm x 0.8 mm x 0.8 mm max) Murata DCR 64 m ISAT 3.1 A COUT 2 x 22 F, 6.3 V, X5R, 0402 GRM155R60J226ME11 C 44 F (1.0 mm x 0.5 mm) Murata CIN 10 F, 6.3 V, X5R, 0402 C1005X5R0J106M050BC C 10 F (1.0 mm x 0.5 mm) TDK Pin Configuration VOUT VOUT PVIN PVIN VOUT VOUT A1 A2 A3 A3 A2 A1 SW SW MODE 0 MODE 0 SW SW B1 B2 B3 B3 B2 B1 PGND PGND MODE 1 MODE 1 PGND PGND C1 C2 C3 C3 C2 C1 Top View Bottom View (Bumps Down) (Bumps Up) Figure 2. Pin Assignment Pin Descriptions Table 2. PIN DESCRIPTIONS Pin Name Description A1 VOUT Output Voltage: This pin is the output voltage terminal. Connect directly to COUT. A2 A3 PVIN Input Voltage: Connect to LiIon battery input power source and CIN. B1 SW Switching Node: Connect to inductor. B2 B3 MODE 0 MODE 0: In combination with MODE 1 selects the operation of the part. C1 PGND Power Ground: This is the power return for the IC. COUT and CIN capacitors should be returned with the shortest path possible to these pins. C2 C3 MODE 1 MODE 1: In combination with MODE 0 selects the operation of the part. www.onsemi.com 2