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FDMS7608S Dual N-Channel PowerTrench MOSFET May 2014 FDMS7608S Dual N-Channel PowerTrench MOSFET Q1: 30 V, 22 A, 10.0 m Q2: 30 V, 30 A, 6.3 m Features General Description Q1: N-Channel This device includes two specialized N-Channel MOSFETs in a Max r = 10.0 m at V = 10 V, I = 12 A dual MLP package. The switch node has been internally DS(on) GS D connected to enable easy placement and routing of synchronous Max r = 13.6 m at V = 4.5 V, I = 10 A DS(on) GS D buck converters. The control MOSFET (Q1) and synchronous Q2: N-Channel TM SyncFET (Q2) have been designed to provide optimal power Max r = 6.3 m at V = 10 V, I = 15 A DS(on) GS D efficiency. Max r = 7.2 m at V = 4.5 V, I = 13 A DS(on) GS D Applications RoHS Compliant Computing Communications General Purpose Point of Load Notebook VCORE S2 Q2 S2 D1 S2 S2 G2 S1/D2 S2 D1 D1 D1 D1 S2 D1 D1 G1 Q1 Pin1 Top Bottom G2 G1 Power 56 MOSFET Maximum Ratings T = 25C unless otherwise noted A Symbol Parameter Q1 Q2 Units V Drain to Source Voltage 30 30 V DS V Gate to Source Voltage (Note 3) 20 20 V GS Drain Current -Continuous (Package limited) T = 25 C 22 30 C 1a 1b I -Continuous T = 25 C 12 15 A D A -Pulsed 50 60 E Single Pulse Avalanche Energy (Note 4) 29 33 mJ AS 1a 1b Power Dissipation for Single Operation T = 25C 2.2 2.5 A P W D 1c 1d Power Dissipation for Single Operation T = 25C 1.0 1.0 A T , T Operating and Storage Junction Temperature Range -55 to +150 C J STG Thermal Characteristics 1a 1b R Thermal Resistance, Junction to Ambient 57 50 JA 1c 1d R Thermal Resistance, Junction to Ambient 125 120 C/W JA R Thermal Resistance, Junction to Case 4.0 3.2 JC Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity FDMS7608S FDMS7608S Power 56 13 12 mm 3000 units 2011 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FDMS7608S Rev.C1