Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers July 2006 Single-Channel: 6N137, HCPL-2601, HCPL-2611 tm Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers Features Description Very high speed-10 MBit/s The 6N137, HCPL-2601/2611 single-channel and HCPL-2630/ 2631 dual-channel optocouplers consist of a 850 nm AlGaAS Superior CMR-10 kV/s LED, optically coupled to a very high speed integrated photo- Double working voltage-480V detector logic gate with a strobable output. This output features Fan-out of 8 over -40C to +85C an open collector, thereby permitting wired OR outputs. The Logic gate output coupled parameters are guaranteed over the temperature range Strobable output of -40C to +85C. A maximum input signal of 5 mA will provide a minimum output sink current of 13mA (fan out of 8). Wired OR-open collector U.L. recognized (File E90700) An internal noise shield provides superior common mode rejec- tion of typically 10kV/s. The HCPL- 2601 and HCPL- 2631 has a minimum CMR of 5 kV/s. The HCPL-2611 has a minimum Applications CMR of 10 kV/s. Ground loop elimination LSTTL to TTL, LSTTL or 5-volt CMOS Line receiver, data transmission Data multiplexing Switching power supplies Pulse transformer replacement Computer-peripheral interface PackageSchematic V N/C 1 8 + V CC 1 8 CC 8 V F1 + 2 7 V E 2 7 V 01 1 V F 3 6 V V O 3 6 02 V F2 GND N/C 4 5 GND + 4 5 8 8 6N137 HCPL-2630 1 HCPL-2601 HCPL-2631 1 HCPL-2611 Truth Table (Positive Logic) Input Enable Output H H L L H H H L H L L H H NC L L NC H A 0.1F bypass capacitor must be connected between pins 8 and 5. (See note 1) 1 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.5Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers (T = 25C unless otherwise specied) Absolute Maximum Ratings A Parameter Symbol Value Units Storage Temperature T -55 to +125 C STG Operating Temperature T -40 to +85 C OPR Lead Solder Temperature T 260 for 10 sec C SOL EMITTER DC/Average Forward Single Channel I 50 mA F Input Current Dual Channel (Each Channel) 30 Enable Input Voltage Single Channel V 5.5 V E Not to exceed V by more than 500 mV CC Reverse Input Voltage Each Channel V 5.0 V R Power Dissipation Single Channel P 100 mW I Dual Channel (Each Channel) 45 DETECTOR Supply Voltage V 7.0 V CC (1 minute max) Output Current Single Channel I 50 mA O Dual Channel (Each Channel) 50 Output Voltage Each Channel V 7.0 V O Collector Output Single Channel P 85 mW O Power Dissipation Dual Channel (Each Channel) 60 Recommended Operating Conditions Parameter Symbol Min Max Units Input Current, Low Level I 0 250 A FL Input Current, High Level I *6.3 15 mA FH Supply Voltage, Output V 4.5 5.5 V CC Enable Voltage, Low Level V 0 0.8 V EL Enable Voltage, High Level V 2.0 V V EH CC Low Level Supply Current T -40 +85 C A Fan Out (TTL load) N 8 *6.3mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is 5.0 mA or less. 2 www.fairchildsemi.com Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.5