MC10E457, MC100E457
5 V ECL Triple Differential
2:1 Multiplexer
Description
The MC10E457/100E457 is a 3-bit differential 2:1 multiplexer. The
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fully differential data path makes the device ideal for multiplexing low
skew clock or other skew sensitive signals.
The higher frequency outputs provide the device with a > 1.0 GHz
bandwidth to meet the needs of the most demanding system clock.
Both, separate selects and a common select, are provided to make
the device well suited for both data path and random logic
applications.
The differential inputs have internal clamp structures which will
PLCC28
force the Q output of a gate in an open input condition to go to a LOW
FN SUFFIX
state. Thus, inputs of unused gates can be left open and will not affect CASE 77602
the operation of the rest of the device. Note that the input clamp will
take affect only if both inputs fall 2.5 V below V .
CC
The 100 Series contains temperature compensation.
MARKING DIAGRAM*
Multiple V pins are provided to ease AC coupling input signals.
BB
128
The V pins, internally generated voltage supply pins, are available
BB
to this device only. For single-ended input conditions, the unused
differential input is connected to V as a switching reference voltage.
BB
V may also rebias AC coupled inputs. When used, decouple V
BB BB MCxxxE457FNG
and V via a 0.01 F capacitor and limit current sourcing or sinking
CC AWLYYWW
to 0.5 mA. When not used, V should be left open.
BB
Features
xxx = 10 or 100
Differential D and Q; V available
BB
A = Assembly Location
700 ps Max. Propagation Delay
WL = Wafer Lot
YY = Year
High Frequency Outputs
WW = Work Week
Separate and Common Select
G = Pb-Free Package
PECL Mode Operating Range: V = 4.2 V to 5.7 V
CC
*For additional marking information, refer to
with V = 0 V
Application Note AND8002/D.
EE
NECL Mode Operating Range: V = 0 V
CC
with V = 4.2 V to 5.7 V
EE
ORDERING INFORMATION
Internal Input 50 k Pulldown Resistors
ESD Protection:
Device Package Shipping
> 2 kV Human Body Model
MC10E457FNR2G PLCC28 500 Tape & Reel
> 200 V Machine Model
(Pb-Free)
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
MC100E457FNR PLCC28 37 Units / Tube
(Pb-Free)
Moisture Sensitivity: Level 3 (Pb-Free)
(For Additional Information, see Application Note AND8003/D) For information on tape and reel specifications, in-
cluding part orientation and tape sizes, please refer
Flammability Rating: UL 94 V0 @ 0.125 in,
to our Tape and Reel Packaging Specifications
Oxygen Index: 28 to 34
Brochure, BRD8011/D.
Transistor Count = 218 Devices
These Devices are Pb-Free, Halogen Free and are RoHS Compliant
Semiconductor Components Industries, LLC, 2016
1 Publication Order Number:
July, 2016 Rev. 9 MC10E457/DMC10E457, MC100E457
SEL2 DaD a V D b D b COMSEL
2 2 BB 2 2
D a
0
H
D a
Q
25 24 23 22 21 20 19 0 0
2:1
18 Q
SEL1 26
2
MUX
D b
0 Q
0
L
17 Q
D a 27 D b
2
1 0
SEL0
28 16
D a V
1 CC
Pinout: 28-Lead PLCC
1
15
V Q
EE 1
(Top View)
D a
1
H
2 14
V Q
BB 1 D a
Q
1
1
2:1
MUX
3 13
D b Q
1 0
D b
1 Q
1
L
D b
1
D b 4
12 Q
1
0
SEL1
567 89 10 11
SEL0 D a D a V D b D b V
0 0 BB 0 0 CCO
D a
2
H
* All V and V pins are tied together on the die.
D a
CC CCO
2 Q
2
2:1
Warning: All V , V , and V pins must be externally
CC CCO EE MUX
D b
2
Q
connected to Power Supply to guarantee proper operation.
2
L
D b
2
Figure 1. Pinout Assignment
SEL2
COMSEL
V
BB
Figure 2. Logic Diagram
Table 1. PIN DESCRIPTION
PIN FUNCTION
Dn[0:2]; Dn[0:2] ECL Differential Data Inputs
SEL ECL Individual Select Input
COMSEL ECL Common Select Input
Q[0:2], Q[0:2] ECL Differential Data Outputs
V Reference Voltage Output
BB
V V Positive Supply
CC, CCO
V Negative Supply
EE
Table 2. FUNCTION TABLE
SEL Data
H a
L b
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2