3.3 V/5 VECL Differential Receiver/Driver MC10EP16, MC100EP16 Description The EP16 is a worldclass differential receiver/driver. The device is www.onsemi.com functionally equivalent to the EL16 and LVEL16 devices with higher performance capabilities. With output transition times significantly faster than the EL16 and LVEL16, the EP16 is ideally suited for interfacing with high frequency sources. 8 8 The V pin, an internally generated voltage supply, is available to BB 1 1 this device only. For single-ended input conditions, the unused differential input is connected to V as a switching reference voltage. BB V may also rebias AC coupled inputs. When used, decouple V BB BB SOIC8 NB TSSOP8 DFN8 and V via a 0.01 F capacitor and limit current sourcing or sinking D SUFFIX DT SUFFIX MN SUFFIX CC CASE 75107 CASE 948R02 CASE 506AA to 0.5 mA. When not used, V should be left open. BB Under open input conditions (pulled to V ) internal input clamps EE will force the Q output LOW. The 100 Series contains temperature compensation. MARKING DIAGRAMS* Features 8 8 220 ps Typical Propagation Delay HEP16 Maximum Frequency = > 4 GHz Typical HP16 ALYW ALYW PECL Mode Operating Range: 1 V = 3.0 V to 5.5 V with V = 0 V 1 CC EE NECL Mode Operating Range: 8 8 V = 0 V with V = 3.0 V to 5.5 V CC EE KEP16 Open Input Default State KP16 ALYW ALYW Safety Clamp on Inputs 14 1 Q Output Will Default LOW with Inputs Open or at V 1 EE V Output BB SOIC8 NB TSSOP8 DFN8 These Devices are Pb-Free, Halogen Free and are RoHS Compliant H = MC10 K = MC100 3B = MC100 M = Date Code A = Assembly Location L = Wafer Lot Y = Year W = Work Week = Pb-Free Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: May, 2021 Rev. 8 MC10EP16/D 3B M MC10EP16, MC100EP16 Table 1. PIN DESCRIPTION NC 1 8 V CC PIN FUNCTION D*, D** ECL Data Inputs Q, Q ECL Data Outputs D 2 7 Q V Reference Voltage Output BB V Positive Supply CC V Negative Supply EE D 3 6 Q NC No Connect EP (DFN8 only) Thermal exposed pad must be connected to a sufficient ther- mal conduit. Electrically connect to the most negative supply (GND) or leave V45 V BB EE unconnected, floating open. * Pins will default LOW when left open. ** Pins will default to V /2 when left open. CC Figure 1. 8Lead Pinout (Top View) and Logic Diagram Table 2. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor 75 k Internal Input Pullup Resistor 37.5 k ESD Protection Human Body Model > 4 kV Machine Model > 200 V Charged Device Model > 2 kV Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb-Free Pkg SOIC8 NB Level 1 TSSOP8 Level 3 DFN8 Level 1 Flammability Rating Oxygen Index: 28 to 34 UL 94 V0 0.125 in Transistor Count 167 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. www.onsemi.com 2