MC100LVEL12 3.3 VECL Low Impedance Driver Description The MC100LVEL12 is a low impedance drive buffer. With two pairs of OR/NOR outputs the device is ideally suited for high drive www.onsemi.com applications such as memory addressing. The device is functionally equivalent to the EL12 device and operates from a 3.3 V power supply. With propagation delays equivalent to the EL12, the LVEL12 is 8 ideally suited for those applications which require the ultimate in 8 1 1 AC performance in a low voltage environment. SOIC8 TSSOP8 Features D SUFFIX DT SUFFIX 445 ps Propagation Delay CASE 751 CASE 948R Dual Outputs for 25 Drive Applications ESD Protection: MARKING DIAGRAMS* > 4 kV Human Body Model > 200 V Machine Model 8 8 The 100 Series Contains Temperature Compensation KVL12 KV12 ALYW PECL Mode Operating Range: V = 3.0 V to 3.8 V ALYW CC with V = 0 V EE 1 1 NECL Mode Operating Range: V = 0 V CC with V = 3.0 V to 3.8 V EE SOIC8 TSSOP8 Internal Input Pulldown Resistors A = Assembly Location Q Output will Default LOW with All Inputs Open or at V EE L = Wafer Lot Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test Y = Year W = Work Week Moisture Sensitivity: = Pb-Free Package Level 1 for SOIC8 (Note: Microdot may be in either location) Level 3 for TSSOP8 *For additional marking information, refer to For Additional Information, see Application Note AND8003/D Application Note AND8002/D. Flammability Rating: UL94 V0 0.125 in, Oxygen Index: 28 to 34 ORDERING INFORMATION Transistor Count = 83 Devices These Devices are Pb-Free, Halogen Free and are RoHS Compliant Device Package Shipping MC100LVEL12DG SOIC8 98 Units / Tube (Pb-Free) MC100LVEL12DTG TSSOP8 100 Units / Tube (Pb-Free) Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: July, 2016 Rev. 5 MC100LVEL12/DMC100LVEL12 Table 1. PIN DESCRIPTION Q 1 8 V a CC PIN FUNCTION D0, D1 ECL Data Inputs Qa, Qa Qb, Qb ECL Data Outputs Q 2 7 D b 0 V Positive Supply CC V Negative Supply EE Q 3 6 D a 1 Q45 V b EE Figure 1. Logic Diagram and Pinout Assignment Table 2. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Units V PECL Mode Power Supply V = 0 V 8 to 0 V CC EE V NECL Mode Power Supply V = 0 V 8 to 0 V EE CC V PECL Mode Input Voltage V = 0 V V V 6 to 0 V I EE I CC V = 0 V V V 6 to 0 CC I EE NECL Mode Input Voltage I Output Current Continuous 50 mA out Surge 100 T Operating Temperature Range 40 to +85 C A T Storage Temperature Range 65 to +150 C stg Thermal Resistance (Junction-to-Ambient) 0 lfpm SOIC8 190 C/W JA 500 lfpm SOIC8 130 Thermal Resistance (Junction-to-Case) Standard Board SOIC8 41 to 44 5% C/W JC Thermal Resistance (Junction-to-Ambient) 0 lfpm TSSOP8 185 C/W JA 500 lfpm TSSOP8 140 Thermal Resistance (Junction-to-Case) Standard Board TSSOP8 41 to 44 5% C/W JC T Wave Solder (Pb-Free) < 2 to 3 sec 260C 265 C sol Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. www.onsemi.com 2