MC100LVEL90 -3.3 V / -5 VTriple ECL Input to LVPECL Output Translator Description The MC100LVEL90 is a triple ECL to LVPECL translator. The device receives either 3.3 V or 5 V differential ECL signals, determined by the www.onsemi.com V supply level, and translates them to +3.3 V differential LVPECL EE output signals. To accomplish the level translation, the LVEL90 requires three power rails. The V supply should be connected to the positive supply, and the CC V pin should be connected to the negative power supply. The GND EE pins, as expected, are connected to the system ground plane. Both V EE and V should be bypassed to ground via 0.01 F capacitors. CC Under open input conditions, the D input will be biased at V /2 and EE SOIC20 WB the D input will be pulled to V . This condition will force the Q output DW SUFFIX EE CASE 751D to a LOW, ensuring stability. The V pin, an internally generated voltage supply, is available to this BB device only. For single-ended input conditions, the unused differential input is connected to V as a switching reference voltage. V may also BB BB rebias AC coupled inputs. When used, decouple V and V via a BB CC MARKING DIAGRAM* 0.01 F capacitor and limit current sourcing or sinking to 0.5 mA. When not used, V should be left open. BB 20 Features 500 ps Propagation Delays 100LVEL90 ESD Protection: > 2 kV HBM, > 200 V MM AWLYYWWG The 100 Series Contains Temperature Compensation Operating Range: V = 3.0 V to 3.8 V CC 1 V = 3.0V to 5.5 V GND = 0 V EE Internal Input Pulldown Resistors A = Assembly Location WL = Wafer Lot Q Output will Default LOW with Inputs Open or at V EE YY = Year Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test WW = Work Week G = Pb-Free Package Moisture Sensitivity: Level 3 (Pb-Free) For Additional Information, see Application Note AND8003/D *For additional marking information, refer to Flammability Rating: UL 94 V0 0.125 in, Application Note AND8002/D. Oxygen Index: 28 to 34 Transistor Count = 261 devices ORDERING INFORMATION These Devices are Pb-Free, Halogen Free and are RoHS Compliant Device Package Shipping MC100LVEL90DWG SOIC20 WB 38 Units/Tube (Pb-Free) MC100LVEL90DWR2G SOIC20 WB 1000/Tape & Reel (Pb-Free) For information on tape and reel specifications, in- cluding part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: July, 2016 Rev. 12 MC100LVEL90/DMC100LVEL90 V Q0 Q0 GND Q1 Q1 GND Q2 Q2 V CC CC Table 1. PIN DESCRIPTION 20 19 18 17 16 15 14 13 12 11 PIN FUNCTION LVPECL LVPECL LVPECL Dn, Dn ECL Inputs Qn, Qn LVPECL Outputs ECL V ECL Reference Voltage Output BB V Positive Supply CC ECL ECL ECL V Negative Supply EE GND Ground 1 2 3 4 567 8 9 10 V D0 D0 D1 D1 D2 D2 V CC EE * All V pins are tied together on the die. CC Warning: All V , V , and GND pins must be externally CC EE connected to Power Supply to guarantee proper operation. Figure 1. Logic Diagram and Pinout: 20-Lead SOIC (Top View) Table 2. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit V PECL Power Supply GND = 0 V 8 to 0 V CC V NECL Power Supply GND = 0 V 8 to 0 V EE V NECL Mode Input Voltage GND = 0 V V V 6 to 0 V I I EE I Output Current Continuous 50 mA out Surge 100 I ECL V Sink/Source 0.5 mA BB BB T Operating Temperature Range 40 to +85 C A T Storage Temperature Range 65 to +150 C stg Thermal Resistance (Junction-to-Ambient) 0 lfpm SOIC20 WB 90 C/W JA 500 lfpm 60 Thermal Resistance (Junction-to-Case) Standard Board SOIC20 WB 30 to 35 C/W JC T Wave Solder 265 C sol Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. www.onsemi.com 2 ECL V BB ECL V BB