MC100LVELT22DT ON Semiconductor

MC100LVELT22 3.3VDual LVTTL/LVCMOS to Differential LVPECL Translator Description MC100LVELT22 Table 1. PIN DESCRIPTION Q0 1 8 V CC PIN FUNCTION Qn, Qn LVPECL Differential Outputs Q0 2 7 D0 D0, D1 LVTTL/LVCMOS Inputs V Positive Supply CC LVTTL/ LVPECL GND Ground LVCMOS EP (DFN8 only) Thermal exposed Q1 3 6 D1 pad must be connected to a suf- ficient thermal conduit. Electric- ally connect to the most negative supply (GND) or leave uncon- Q145 GND nected, floating open. Figure 1. 8Lead Pinout (Top View) and Logic Diagram Table 2. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor N/A Internal Input Pullup Resistor N/A ESD Protection Human Body Model > 4 kV Machine Model > 200 V Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Level 1 Flammability Rating Oxygen Index: 28 to 34 UL 94 V0 0.125 in Transistor Count 164 Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Table 3. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit V Positive Power Supply GND = 0 V 7 V CC V Input Voltage GND = 0 V V V 7 V I I CC I Output Current Continuous 50 mA out Surge 100 mA T Operating Temperature Range 40 to +85 C A T Storage Temperature Range 65 to +150 C stg Thermal Resistance (JunctiontoAmbient) 0 lfpm SO8 190 C/W JA 500 lfpm SO8 130 C/W Thermal Resistance (Junction toCase) std bd SO8 41 to 44 5% C/W JC Thermal Resistance (JunctiontoAmbient) 0 lfpm TSSOP8 185 C/W JA 500 lfpm TSSOP8 140 C/W Thermal Resistance (Junction toCase) std bd TSSOP8 41 to 44 5% C/W JC Thermal Resistance (JunctiontoAmbient) 0 lfpm DFN8 129 C/W JA 500 lfpm DFN8 84 C/W T Wave Solder Pb <2 to 3 sec 248C 265 C sol Pb Free <2 to 3 sec 260C 265 Thermal Resistance (Junction toCase) (Note 2) DFN8 35 to 40 C/W JC Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 2. JEDEC standard multilayer board 2S2P (2 signal, 2 power)