MC10H113
Quad Exclusive OR Gate
Description
The MC10H113 is a Quad Exclusive OR Gate with an enable
common to all four gates. The outputs may be wireORed together to
perform a 4bit comparison function (A = B). The enable is active
MC10H113
E9
4
TRUTH TABLE
2
5
IN E OUTPUT
LLL L
LHH L
V 1 16 V
CC1 CC2
HHL L
6
3 D
A 2 15
out out
HLH L
7
X X H L
B 3 14 C
out out
V = Pin 1
CC1
A 4 13 D
in in
V = Pin 16
CC2
10
A 5 12 D
in
14 V = Pin 8 in
EE
11
B 6 11 C
in
in
Bin 7 10 C
in
12
V 8 9 Enable
15
EE
13
Pin assignment is for Dual in Line Package.
Figure 1. Logic Diagram Figure 2. Pin Assignment
Table 1. MAXIMUM RATINGS
Symbol Characteristic Rating Unit
V Power Supply (V = 0) 8.0 to 0 Vdc
EE CC
V Input Voltage (V = 0) 0 to V Vdc
I CC EE
I Output Current Continuous 50 mA
out
Surge 100
T Operating Temperature Range 0 to +75 C
A
T Storage Temperature Range Plastic 55 to +150 C
stg
Ceramic 55 to +165 C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
Table 2. ELECTRICAL CHARACTERISTICS (V = 5.2 V 5%) (Note 1)
EE
0 25 75
Symbol Characteristic Min Max Min Max Min Max Unit
I Power Supply Current 46 42 46 mA
E
I Input Current High A
inH
Pins 5, 7, 11, 13 430 270 270
Pins 4, 6, 10, 12 510 320 320
Pin 9 1100 740 740
I Input Current Low 0.5 0.5 0.3 A
inL
V High Output Voltage 1.02 0.84 0.98 0.81 0.92 0.735 Vdc
OH
V Low Output Voltage 1.95 1.63 1.95 1.63 1.95 1.60 Vdc
OL
V High Input Voltage 1.17 0.84 1.13 0.81 1.07 0.735 Vdc
IH
V Low Input Voltage 1.95 1.48 1.95 1.48 1.95 1.45 Vdc
IL
1. Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is
maintained. Outputs are terminated through a 50 resistor to 2.0 V.