MC74HC112ADG ON Semiconductor

MC74HC112A Dual J-K Flip-Flop with Set and Reset HighPerformance SiliconGate CMOS The MC74HC112A is identical in pinout to the LS112. The device MC74HC112A 4 SET 1 CLOCK 1 1 16 V CC 2 5 K1 2 15 RESET 1 K1 Q1 J1 1 3 14 RESET 2 CLOCK 1 SET 1 4 13 CLOCK 2 3 6 J1 Q1 Q1 5 12 K2 15 Q1 6 11 J2 RESET 1 Q2 7 10 SET 2 10 GND 8 9 Q2 SET 2 12 9 Figure 1. Pin Assignment K2 Q2 13 CLOCK 2 11 7 FUNCTION TABLE J2 Q2 Inputs Outputs 14 Set Reset Clock J K Q Q RESET 2 L H XXX H L PIN 16 = V H L XXX L H CC PIN 8 = GND L L X X X L* L* H H L L No Change Figure 2. Logic Diagram H H LH LH H H HL HL H H H H Toggle H H L X X No Change H H H X X No Change H H X X No Change *Both outputs will remain low as long as Set and Reset are low, but the output states are unpre- dictable if Set and Reset go high simultaneously. ORDERING INFORMATION Device Package Shipping MC74HC112ADG SOIC16 48 Units / Rail (Pb Free) MC74HC112ADR2G SOIC16 2500 Units / Reel (Pb Free) MC74HC112ADTR2G TSSOP16* 2500 Units / Reel MC74HC112ADTG TSSOP16 96 Units / Tube (Pb Free) For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently PbFree.