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This literature is subject to all applicable copyright laws and is not for resale in any manner.MM74HCT00 Quad 2 Input NAND Gate February 2008 MM74HCT00 Quad 2 Input NAND Gate Features General Description TTL, LS pin-out and threshold compatible The MM74HCT00 is a NAND gates fabricated using advanced silicon-gate CMOS technology which provides Fast switching: t , t =14ns (typ.) PLH PHL the inherent benefits of CMOSlow quiescent power Low power: 10W at DC and wide power supply range. This device is input and High fan out, 10 LS-TTL loads output characteristic and pin-out compatible with stan- dard 74LS logic families. All inputs are protected from static discharge damage by internal diodes to V and CC ground. MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS devices. These parts are also plug-in replacements for LS-TTL devices and can be used to reduce power consumption in existing designs. Ordering InformationOrdering Information Package Order Number Number Package Description MM74HCT00M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow MM74HCT00SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HCT00MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HCT00N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Device also available in Tape and Reel. Specify by appending suffix letter X to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. Connection Diagram Logic Diagram Pin Assignments for DIP, SOIC, SOP and TSSOP (1 of 4 gates) Top View 1984 Fairchild Semiconductor Corporation www.fairchildsemi.com MM74HCT00 Rev. 1.3.0