ecoSWITCH Advanced Load Management Controlled Load Switch with Low R ON NCP45560 The NCP45560 load switch provides a component and area-reducing solution for efficient power domain switching with www.onsemi.com inrush current limit via softstart. In addition to integrated control functionality with ultra low onresistance, this device offers system R TYP V V I * ON CC IN MAX DC safeguards and monitoring via fault protection and power good 4.1 m 3.3 V 1.8 V signaling. This cost effective solution is ideal for power management 3.3 V 5.0 V 17 A and hot-swap applications requiring low power consumption in a 4.3 m small footprint. 3.3 V 12 V 4.9 m Features *I is defined as the maximum steady state MAX DC current the load switch can pass at room ambient Advanced Controller with Charge Pump temperature without entering thermal lockout. Integrated N-Channel MOSFET with Ultra Low R ON Input Voltage Range 0.5 V to 13.5 V Soft-Start via Controlled Slew Rate Adjustable Slew Rate Control 1 Power Good Signal DFN12, 3x3 Thermal Shutdown CASE 506CD Undervoltage Lockout Short-Circuit Protection MARKING DIAGRAM Extremely Low Standby Current NCP45 Load Bleed (Quick Discharge) 560x This is a PbFree Device ALYW Typical Applications x = H for NCP45560H Portable Electronics and Systems = L for NCP45560L Notebook and Tablet Computers A = Assembly Location Telecom, Networking, Medical, and Industrial Equipment L = Wafer Lot Y = Year SetTop Boxes, Servers, and Gateways W = Work Week HotSwap Devices and Peripheral Ports = PbFree Package (Note: Microdot may be in either location) V V EN PG CC IN PIN CONFIGURATION Thermal, V 1 12 V IN OUT Bandgap Undervoltage Control & & V EN 2 11 Logic OUT Biases ShortCircuit Protection 3 V V 10 OUT CC 13: V IN V GND 4 9 OUT Delay and 5 V SR 8 OUT Charge Slew Rate Pump Control 6 PG 7 BLEED (Top View) SR GND BLEED V OUT ORDERING INFORMATION See detailed ordering and shipping information on page 13 of Figure 1. Block Diagram this data sheet. Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: May, 2020 Rev. 7 NCP45560/DNCP45560 Table 1. PIN DESCRIPTION Pin Name Function 1, 13 V Drain of MOSFET (0.5 V 13.5 V), Pin 1 must be connected to Pin 13 IN 2 EN NCP45560H Activehigh digital input used to turn on the MOSFET, pin has an internal pull down resistor to GND NCP45560L Activelow digital input used to turn on the MOSFET, pin has an internal pull up resistor to V CC 3 V Supply voltage to controller (3.0 V 5.5 V) CC 4 GND Controller ground 5 SR Slew rate adjustment float if not used 6 PG Activehigh, opendrain output that indicates when the gate of the MOSFET is fully charged, external pull up resistor 1 k to an external voltage source required tie to GND if not used. 7 BLEED Load bleed connection, must be tied to V either directly or through a resistor OUT 1 k 812 V Source of MOSFET connected to load OUT Table 2. ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit Supply Voltage Range V 0.3 to 6 V CC Input Voltage Range V 0.3 to 18 V IN Output Voltage Range V 0.3 to 18 V OUT EN Digital Input Range V 0.3 to (V + 0.3) V EN CC PG Output Voltage Range (Note 1) V 0.3 to 6 V PG Thermal Resistance, JunctiontoAmbient, Steady State (Note 2) R 28.6 C/W JA Thermal Resistance, JunctiontoAmbient, Steady State (Note 3) R 49.7 C/W JA Thermal Resistance, JunctiontoCase (V Paddle) R 1.7 C/W IN JC Continuous MOSFET Current T = 25C (Notes 3 and 4) I 17 A A MAX Continuous MOSFET Current T = 25C (Notes 2 and 4) I 18.3 A A MAX Transient MOSFET Current (for up to 500 s) I 40 A MAX TRANS Total Power Dissipation T = 25C (Note 2) P 3.49 W A D Derate above T = 25C 34.9 mW/C A Total Power Dissipation T = 25C (Note 3) P 2.01 W A D Derate above T = 25C 20.1 mW/C A Storage Temperature Range T 40 to 150 C STG Lead Temperature, Soldering (10 sec.) T 260 C SLD ESD Capability, Human Body Model (Notes 5 and 6) ESD 3.0 kV HBM ESD Capability, Machine Model (Note 5) ESD 200 V MM ESD Capability, Charged Device Model (Note 5) ESD 1.0 kV CDM Latchup Current Immunity (Notes 5 and 6) LU 100 mA Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. PG is an opendrain output that requires an external pull up resistor 1 k to an external voltage source. 2. Surfacemounted on FR4 board using 1 sqin pad, 1 oz Cu. 3. Surfacemounted on FR4 board using the minimum recommended pad size, 1 oz Cu. 4. Ensure that the expected operating MOSFET current will not cause the ShortCircuit Protection to turn the MOSFET off undesirably. 5. Tested by the following methods T = 25C: A ESD Human Body Model tested per JESD22 A114 ESD Machine Model tested per JESD22A115 ESD Charged Device Model per ESD STM5.3.1 Latchup Current tested per JESD78 6. Rating is for all pins except for V and V which are tied to the internal MOSFETs Drain and Source. Typical MOSFET ESD performance IN OUT for V and V should be expected and these devices should be treated as ESD sensitive. IN OUT www.onsemi.com 2