NCP5230MNTWG ON Semiconductor

NCP5230 Low Voltage Synchronous Buck Controller with Power Saving Mode The NCP5230 is a simple single phase solution with differential phase current sensing, power saving operation, and gate drivers to NCP5230 15 6 2.2 4 BOOT Over Current Detector CSP 13 5 UG CDIFF + Current Sense CSN/VO Amplifier LX 12 3 UVP OSC Control Logic, COMP Protection, 8 + VREF*75% FBG RAMP 11 + UVLO Generator and Control 0.8V Error Amplifier PWM Logic VCCP 1 FB 9 + OVP VREF*125% LG 2 OVP, UNLATCHED 10 VSEN 1.24V + VREF*50% ROSC/EN 14 Programmable OSC SYNC GND 7 16 Figure 1. NCP5230 BLOCK DIAGRAM PIN DESCRIPTIONS Pin No. Symbol Description 1 VCCP Power supply for bottom gate MOSFET drivers 2 LG Bottom gate MOSFET driver pin 3 LX Switch node 4 BOOT Supply rail for the floating top gate driver 5 UG Top gate MOSFET driver pin 6 PGOOD Power Good. It is an opendrain output, set free after SS (with 3x clock delay) as long as the output voltage monitored through VSEN is within specifications. 7 SYNC Synchronization Pin. The controller synchronizes on the falling edge of a square wave provided to this pin. Short to GND if not used. 8 COMP Output of the error amplifier 9 FB Inverting input to the error amplifier 10 VSEN Output Voltage Sense 11 FBG Remote Ground Sense 12 CSN/VO Inductor differential sense inverting input 13 CSP Inductor differential sense non inverting input 14 ROSC/EN Programs the switching frequency EN: Pull low to disable the device 15 VCC Supply rail for the controller internal circuitry 16 GND Ground reference THERMAL PAD Connects with the silicon substrate for good thermal contact with the PCB. Connect to GND plane.