Product Information

NCV360SNAET1G

NCV360SNAET1G electronic component of ON Semiconductor

Datasheet
Supervisory Circuits Overvoltage Protection Circuit USB Positive with Internal PMOS FET and Status Flag

Manufacturer: ON Semiconductor
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
N/A

Obsolete
Availability Price Quantity
0 - WHS 1

MOQ : 3000
Multiples : 3000

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NCV360SNAET1G
ON Semiconductor

3000 : USD 0.2724
30000 : USD 0.2608
300000 : USD 0.2556
N/A

Obsolete
0 - WHS 2

MOQ : 1
Multiples : 1

Stock Image

NCV360SNAET1G
ON Semiconductor

1 : USD 1.0956
10 : USD 0.8954
100 : USD 0.2843
500 : USD 0.2545
1000 : USD 0.233
3000 : USD 0.2155
6000 : USD 0.2155
9000 : USD 0.2094
24000 : USD 0.2032
N/A

Obsolete
     
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RoHS - XON
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NCP360, NCV360 USB Positive Overvoltage Protection Controller with Internal PMOS FET and Status FLAG NCP360, NCV360 PIN CONNECTIONS OUT IN 1 5 EN 1 6 FLAG GND 2 GND 2 PAD1 5 OUT EN FLAG 3 4 IN 3 4 OUT TSOP5 UDFN6 (Top Views) PIN FUNCTION DESCRIPTION UDFN6 Package) Pin No. Name Type Description 1 EN INPUT Enable Pin. The device enters in shutdown mode when this pin is tied to a high level. In this case the output is disconnected from the input. To allow normal functionality, the EN pin shall be connected to GND or to a I/O pin. This pin does not have an impact on the fault detection. 2 GND POWER Ground 3 IN POWER Input Voltage Pin. This pin is connected to the VBUS. A 1 F low ESR ceramic capacitor, or larger, must be connected between this pin and GND. 4, 5 OUT OUTPUT Output Voltage Pin. The output is disconnected from the VBUS power supply when the input voltage is above OVLO threshold or below UVLO threshold. A 1 F capacitor must be connected to these pins. The two OUT pins must be hardwired to common supply. 6 FLAG OUTPUT Fault Indication Pin. This pin allows an external system to detect a fault on VBUS pin. The FLAG pin goes low when input voltage exceeds OVLO threshold. Since the FLAG pin is open drain functionality, an external pull up resistor to V must be added. CC PAD1 POWER Exposed Pad. Can be connected to GND or isolated plane. Must be used to thermal dissipation. PIN FUNCTION DESCRIPTION (TSOP5 Package) Pin No. Name Type Description 1 IN POWER Input Voltage Pin. This pin is connected to the VBUS. A 1 F low ESR ceramic capacitor, or larger, must be connected between this pin and GND. 2 GND POWER Ground 3 EN INPUT Enable Pin. The device enters in shutdown mode when this pin is tied to a high level. In this case the output is disconnected from the input. To allow normal functionality, the EN pin shall be connected to GND or to a I/O pin. This pin does not have an impact on the fault detection. 4 FLAG OUTPUT Fault Indication Pin. This pin allows an external system to detect a fault on VBUS pin. The FLAG pin goes low when input voltage exceeds OVLO threshold. Since the FLAG pin is open drain functionality, an external pull up resistor to V must be added. CC 5 OUT OUTPUT Output Voltage Pin. The output is disconnected from the VBUS power supply when the input voltage is above OVLO threshold or below UVLO threshold. A 1 F capacitor must be connected to this pin.

Tariff Desc

8542.31.00 51 No ..Application Specific (Digital) Integrated Circuits (ASIC)

Electronic integrated circuits: Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Monolithic integrated circuits:
Aptina / ON Semiconductor
FAIRCHILD
FAIRCHILD (ON SEMICONDUCTOR)
Fairchild Semiconductor
FS8
FSC
ON
ON SEMI
ON Semicon
ON SEMICONDUCTOR
ON SEMICONDUCTOR (FAIRCHILD)
ON Semiconductor / Fairchild
ON4
ON5
onsemi
ON-SEMI
onsemi / Fairchild
OOF
Xsens / Fairchild

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