TCC-103 Three-Output PTIC Control IC Introduction ON Semiconductors PTIC Controller IC is a three-output high voltage digital to analog control IC specifically designed to control www.onsemi.com and bias ON Semiconductors Passive Tunable Integrated Circuits (PTICs). These tunable capacitive circuits are intended for use in mobile phones and dedicated RF tuning applications. The implementation of ONSemiconductors tunable circuits in mobile phones enables CSP16, 2.10x1.90 significant improvement in terms of antenna radiated performance. CASE 568AE The tunable capacitors are controlled through a bias voltage ranging from 2 V to 20 V. The TCC103 high-voltage PTIC control IC has been specifically designed to cover this need, providing three MARKING DIAGRAM independent high-voltage outputs that control up to three different tunable PTICs in parallel. The device is fully controlled through a multi-protocol digital interface. TCCx Features ALYW Controls ON Semiconductors PTIC Tunable Capacitors and RF Tuners Compliant with Timing Needs of Cellular and Other Wireless System CSP16 Requirements TCC = Product Code Integrated Boost Converter with 3 Programmable Outputs x = MIPI ID (Up To 24 V) A = Assembly Location L = Wafer Lot Code Low Power Consumption Y = Year Code Auto-detection of SPI (30- or 32-bit) or MIPI RFFE Interfaces W = Week Code (1.2 V or 1.8 V) O = Pin 1 Marker Available in WLCSP (RDL Ball Array) and for Stand-alone or Module Integration ORDERING INFORMATION These are PbFree Devices See detailed ordering and shipping information in the package dimensions section on page 21 of this data sheet. Typical Applications Multi-band, Multi-standard, Advanced and Simple Mobile Phones Tunable Antenna Matching Networks Compatible with Closed Loop and Open-loop Antenna Tuner Applications Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: May, 2016 Rev. 9 TCC103/DTCC103 L BOOST VHV GND BOOST VREG BOOSTER REGULATOR BANDGAP AVDD vio oi VREG RC bias start/vreg start GNDA POR OSC 7 4 BIT 7 BIT OUT A VIO DAC DAC VIO POR por vreg START REFERENCE 7 7 BIT GNDIO REGISTERS OUT B DAC 7 7 BIT INTERFACE OUT C DAC LEVEL OTP TRIG SHIFTER VIO CS CLK DATA ATEST AVDD VREG VHV Figure 1. HVDAC Functional Block Diagram www.onsemi.com 2