TCC-303A-RT

Three-Output PTIC Control IC TCC-303 Introduction TCC303 is a threeoutput highvoltage digital to analog control IC specifically designed to control and bias ON Semiconductors Passive www.onsemi.com Tunable Integrated Circuits (PTICs). These tunable capacitor control circuits are intended for use in mobile phones and dedicated RF tuning applications. The implementation of ON Semiconductors tunable circuits in mobile phones enables significant improvement in terms of antenna radiated WLCSP12 performance. CASE 567MW The tunable capacitors are controlled through a bias voltage ranging from 1 V to 24 V. The TCC303 highvoltage PTIC control IC has been specifically designed to cover this need, providing three MARKING DIAGRAM independent highvoltage outputs that control up to three different tunable PTICs in parallel. The device is fully controlled through a T33x MIPI RFFE digital interface. ALYW Key Features T33x= Specific Device Code Controls ON Semiconductors PTIC Tunable Capacitors x = a or b Compliant with Timing Needs of Cellular and Other Wireless System A = Assembly Location L = Wafer Lot Requirements Y = Year 28 V Integrated Boost Converter with Three 24 V Programmable W = Work Week DAC Outputs = PbFree Package Low Power Consumption (Note: Microdot may be in either location) MIPI RFFE Interfaces (1.8 V) Available in WLCSP (RDL ball arrays) ORDERING INFORMATION Compliant with MIPI 26 MHz ReadBack See detailed ordering and shipping information on page 30 of This is a PbFree Device this data sheet. Typical Applications Multiband, Multistandard, Advanced and Simple Mobile Phones Tunable Antenna Matching Networks Compatible with Closedloop and Openloop Antenna Tuner Applications Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: September, 2019 Rev. 5 TCC303/DTCC303 L BOOST VHV GND BOOST VREG Booster Regulator Bandgap VDDA vio on VREG RC OSC GND POR ibias start / vref start 7 bit 4 bit 7 OUTA VIO VIO DAC DAC POR por vreg Start Reference Registers 7 bit 7 OUTB DAC 7 bit Interface 7 OUTC Level DAC Shifter Level VIO Shifter VDDA OTP VREG VHV CLK DATA ATEST Figure 1. Control IC Functional Block Diagram A1 A2 A3 A3 A2 A1 OUTC VREG VHV B1 B2 B3 B3 B2 B1 OUTB ATEST L BOOST C1 C2 C3 C3 C2 C1 OUTA GND VDDA D1 D2 D3 D3 D2 D1 VIO DATA CLK Figure 2. RDL Padout, Bump Side View (left), PCB footprint (right), with RDL Bump Assignment www.onsemi.com 2