557G-03LFT Renesas

DATASHEET 2 OUTPUT PCI-EXPRESS GEN1 CLOCK SOURCE ICS557-03 Description Features The ICS557-03 is a spread spectrum clock generator that Packaged in 16-pin TSSOP supports PCI-Express Gen 1 and Ethernet requirements. RoHS 5 (green) or RoHS 6 (green and lead free) The device is used for PC or embedded systems to compliant packaging substantially reduce electromagnetic interference (EMI). Supports HCSL or LVDS output levels The device provides two differential (HCSL) spread spectrum outputs. The spread type and amount are Operating voltage of 3.3 V configured via select pin. Using IDTs patented Input frequency of 25 MHz Phase-Locked Loop (PLL) techniques, the device takes a Jitter 60 ps (cycle-to-cycle) 25 MHz crystal input and produces two pairs of differential outputs at 25 MHz, 100 MHz, 125 MHz or 200 MHz clock Spread Spectrum capability frequencies for HCSL, and 25 MHz or 100 MHz for LVDS. Industrial and commercial temperature ranges For PCIe Gen2 applications, see the 5V41065 For PCIe Gen3 applications, see the 5V41235 Block Diagram VDD 2 SS1:SS0 CLK0 2 Control CLK0 Logic S1:S0 2 Phase Lock Loop CLK1 X1/ICLK Clock CLK1 Buffer/ 25 MHz Crystal crystal or clock Oscillator X2 2 Optional tuning crystal Rr(IREF) capacitors GND OE IDT 2 OUTPUT PCI-EXPRESS GEN1 CLOCK SOURCE 1 ICS557-03 REV U 112111ICS557-03 2 OUTPUT PCI-EXPRESS GEN1 CLOCK SOURCE PCIE SSCG Output Select Table 1 (MHz) Pin Assignment S1 S0 CLK(1:0), CLK(1:0) 1 16 VDDXD S0 00 25M S1 2 CLK0 15 0 1 100M SS0 3 14 CLK0 1 0 125M 1 1 200M X1/ICLK 4 13 GNDODA X2 5 12 VDDODA Spread Selection Table 2 OE 6 CLK1 11 SS1 SS0 Spread% 7 10 GNDXD CLK1 00 No Spread 8 9 0 1 Down -0.5 SS1 IREF 1 0 Down -0.75 16-pin (173 mil) TSSOP 11 No Spread Pin Descriptions Pin Pin Pin Pin Description Number Name Type 1 S0 Input Select pin 0. See Table1. Internal pull-up resistor. 2 S1 Input Select pin 1. See Table 1. Internal pull-up resistor. 3 SS0 Input Spread Select pin 0. See Table 2. Internal pull-up resistor. 4 X1/ICLK Input Crystal or clock input. Connect to a 25 MHz crystal or single ended clock. 5 X2 Output Crystal connection. Leave unconnected for clock input. 6 OE Input Output enable. Tri-states outputs and device is not shut down. Internal pull-up resistor. 7 GNDXD Power Connect to ground. 8 SS1 Input Spread Select pin 1. See Table 2. Internal pull-up resistor. 9 IREF Output Precision resistor attached to this pin is connected to the internal current reference. 10 CLK1 Output HCSL complimentary clock output 1. 11 CLK1 Output HCSL true clock output 1. 12 VDDODA Power Connect to voltage supply +3.3 V for output driver and analog circuits 13 GNDODA Power Connect to ground. 14 CLK0 Output HCSL complimentary clock output 0. 15 CLK0 Output HCSL true clock output 0. 16 VDDXD Power Connect to voltage supply +3.3 V for crystal oscillator and digital circuit. IDT 2 OUTPUT PCI-EXPRESS GEN1 CLOCK SOURCE 2 ICS557-03 REV U 112111