Product Information

7201LA30LB

7201LA30LB electronic component of Renesas

Datasheet
FIFO 512 X 9 BIT CMOS PARALLEL

Manufacturer: Renesas
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



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N/A

Obsolete
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0 - Global Stock

MOQ : 140
Multiples : 140

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7201LA30LB
Renesas

140 : USD 54.972
N/A

Obsolete
     
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CMOS ASYNCHRONOUS FIFO IDT7200L IDT7201LA 256 x 9, 512 x 9 and 1,024 x 9 IDT7202LA LEAD FINISH (SnPb) ARE IN EOL PROCESS - LAST TIME BUY EXPIRES JUNE 15, 2018 o o Industrial temperature range (40 C to +85 C) is available FEATURES: (plastic packages only) First-In/First-Out dual-port memory Green parts available, see ordering information 256 x 9 organization (IDT7200) 512 x 9 organization (IDT7201) DESCRIPTION: 1,024 x 9 organization (IDT7202) The IDT7200/7201/7202 are dual-port memories that load and empty data Low power consumption on a first-in/first-out basis. The devices use Full and Empty flags to prevent data Active: 440mW (max.) overflow and underflow and expansion logic to allow for unlimited expansion Power-down: 28mW (max.) capability in both word size and depth. Ultra high speed12ns access time The reads and writes are internally sequential through the use of ring Asynchronous and simultaneous read and write pointers, with no address information required to load and unload data. Data Fully expandable by both word depth and/or bit width is toggled in and out of the devices through the use of the Write (W) and Read 720x family is pin and functionally compatible from 256 x 9 to 64k x 9 (R) pins. Status Flags: Empty, Half-Full, Full The devices utilize a 9-bit wide data array to allow for control and parity bits Auto-retransmit capability at the users option. This feature is especially useful in data communications High-performance CEMOS technology applications where it is necessary to use a parity bit for transmission/reception Military product compliant to MIL-STD-883, Class B error checking. It also features a Retransmit (RT) capability that allows for reset Standard Military Drawing 5962-87531, 5962-89666, 5962-89863 of the read pointer to its initial position when RT is pulsed LOW to allow for and 5962-89536 are listed on this function retransmission from the beginning of data. A Half-Full Flag is available in the Dual versions available in the TSSOP package. For more informa- single device mode and width expansion modes. tion, see IDT7280/7281/7282 data sheet These FIFOs are fabricated using high-speed CMOS technology. They IDT7280 = 2 x IDT7200 are designed for those applications requiring asynchronous and simultaneous IDT7281 = 2 x IDT7201 read/writes in multiprocessing and rate buffer applications. Military grade IDT7282 = 2 x IDT7202 product is manufactured in compliance with MIL-STD-883, Class B. FUNCTIONAL BLOCK DIAGRAM DATA INPUTS (D0-D8) WRITE W CONTROL RAM WRITE READ ARRAY POINTER POINTER 256 x 9 512 x 9 1,024 x 9 THREE- STATE RS BUFFERS DATA OUTPUTS READ (Q0-Q8) RESET R CONTROL LOGIC FLAG EF FL/RT LOGIC FF EXPANSION 2679 drw 01 XO/HF XI LOGIC IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. NOVEMBER 2017 COMMERCIAL, INDUSTRIAL AND MILITARY TEMPERATURE RANGES 1 2017 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. DSC-2679/15IDT7201L/7201LA/7202LA CMOS ASYNCHRONOUS FIFO COMMERCIAL, INDUSTRIAL AND MILITARY 256 x 9, 512 x 9 and 1,024 x 9 TEMPERATURE RANGES PIN CONFIGURATIONS INDEX W 1 28 VCC D8 2 27 D4 4 3 2 32 31 30 1 D3326 D5 D2 5 29 D6 D2425 D6 D1 6 28 D7 D1524 D7 D0 7 27 NC XI 8 26 FL/RT D0623 FL/RT FF RS 9 25 XI RS 722 Q0 10 24 EF FF821 EF Q1 11 23 XO/HF Q0920 XO/HF NC 12 22 Q7 Q1 10 19 Q7 Q2 13 21 Q6 Q2 11 18 Q6 14 15 16 17 18 19 20 Q3 12 17 Q5 Q8 13 16 Q4 R GND 14 15 2679 drw 02b 2679 drw 02a Reference Order Reference Order Package Type Identifier Code Package Type Identifier Code (1) (1) LCC L32- 1 L PLASTIC DIP P28-1 P PLCC J32-1 J PLASTIC THIN DIP P28-2 T P (1) CERDIP D28-1 D TOP VIEW THIN CERDIP D28-3 TD SOIC SO28-3 SO TOP VIEW NOTE: 1. The 600-mil-wide DIP (P28-1 and D28-1) and LCC are not available for the IDT7200. RECOMMENDED DC OPERATING CONDITIONS Symbol Parameter Min. Typ. Max. Unit VCC Supply Voltage 4.5 5.0 5.5 V ABSOLUTE MAXIMUM RATINGS Commercial/Industrial/Military Symbol Rating Coml & Ind l Mil. Unit GND Supply Voltage 0 0 0 V VTERM Terminal Voltage 0.5 to +7.0 0.5 to +7.0 V (1) VIH Input High Voltage Com l/Ind l 2.0 V with Respect (1) VIH Input High Voltage Military 2.2 V to GND (2) VIL Input Low Voltage 0.8 V TSTG Storage 55 to +125 65 to +155 C Commercial/Industrial/Military Temperature TA Operating Temperature Commercial 0 70 C IOUT DC Output 50 to +50 50 to +50 mA TA Operating Temperature Industrial 40 85 C Current TA Operating Temperature Military 55 125 C NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of NOTES: the device at these or any other conditions above those indicated in the operational 1. For RT/RS/XI input, VIH = 2.6V (commercial). sections of this specification is not implied. Exposure to absolute maximum rating For RT/RS/XI input, VIH = 2.8V (military). conditions for extended periods may affect reliability. 2. 1.5V undershoots are allowed for 10ns once per cycle. 2 D3 Q3 D8 Q8 GND W NC NC R VCC D4 Q4 D5 Q5

Tariff Desc

8542.32.00 32 No ..CMOS and MOS Read Only Memory and Programmable Read Only Memory whether erasable or non-erasable (for example, flash memory, EPROM, E2PROM, EAPROM, NOVRAM, ROM and PROM)
CEL (RENESAS)
ID4
IDT
IDT, Integrated Device Technology Inc
INTEGRATED DEVICE
INTEGRATED DEVICE TECHNOLOGY
INTEGRATED DEVICES TECH AID
Intersil
INTERSIL - FGC
Intersil(Renes as Electronics)
Intersil(Renesas Electronics)
ITS
REA
RENESAS
RENESAS (IDT)
RENESAS (INTERSIL)
Renesas / IDT
Renesas / Intersil
Renesas Electronics
Renesas Electronics America
RENESAS TECHNOLOGY

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