DATASHEET 4-OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1, GEN2, AND QPI ICS9DB423 General Description Features/Benefits The ICS9DB423B is compatible with the Intel DB400Q Spread spectrum modulation tolerant, 0 to -0.5% down Differential Buffer Specification. This buffer provides 4 spread and +/- 0.25% center spread PCI-Express SRC or 4 QPI clocks. The ICS9DB423B is Supports undriven differential outputs in Power Down driven by a differential output pair from a CK410B+ or and DIF STOP for modes for power management. CK509B main clock generator. Output Features Recommended Application 4 - 0.7V current-mode differential output pairs DB400Q compatible part with PCIe Gen1, Gen 2 and QPI Supports zero delay buffer mode and fanout mode support Bandwidth programming available 50-133 MHz operation in PLL mode Key Specifications 33-400 MHz operation in Bypass mode Output cycle-cycle jitter < 50ps Output to Output skew <50ps Phase jitter: PCIe Gen1 < 86ps peak to peak Phase jitter: PCIe Gen2 < 3.0/3.1ps rms Phase jitter: QPI < 0.5ps rms Functional Block Diagram 2 OE(6,1) SPREAD SRC IN COMPATIBLE PLL SRC IN 4 M STOP DIF(6,5,2,1) U LOGIC X PD CONTROL BYPASS 133 100 SDATA LOGIC SCLK IREF IDT 4-OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1, GEN2, AND QPI 1 ICS9DB423B REV E 091812ICS9DB423B 4-OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1, GEN2, AND QPI Pin Configuration VDDR 1 28 VDDA VDDR 1 28 VDDA SRC IN 2 27 GNDA SRC IN 2 27 GNDA SRC IN 3 26 IREF SRC IN 3 26 IREF GND 4 25 OE INV GND 4 25 OE INV VDD 5 24 VDD VDD 5 24 VDD DIF 1 6 23 DIF 6 DIF 1 6 23 DIF 6 DIF 1 7 22 DIF 6 DIF 1 7 22 DIF 6 OE 1 8 21 OE 6 OE1 821 OE6 DIF 2 9 20 DIF 5 DIF 2 9 20 DIF 5 DIF 2 10 19 DIF 5 DIF 2 10 19 DIF 5 VDD11 18 VDD VDD11 18 VDD BYPASS 133 100 12 17 HIGH BW BYPASS 133 100 12 17 HIGH BW SCLK 13 16 DIF STOP SCLK 13 16 DIF STOP SDATA 14 15 PD SDATA 14 15 PD OE INV = 0 OE INV = 1 Note: Pin 15 is always active low. This is different than 9DB403. 28-pin SSOP and TSSOP Polarity Inversion Pin List Table Pins OE INV 01 8OE 1 OE1 15 PD PD 16 DIF STOP DIF STOP Various OE x OE x Power Groups Pin Number Description VDD GND 1 4 SRC IN/SRC IN 5,11,18, 24 4 DIF(1,2,5,6) N/A 27 IREF 28 27 Analog VDD & GND for PLL core Frequency Selection BYPASS 133 100 Voltage MODE Low <0.8V Bypass Mid 1.2<Vin<1.8V QPI 133MHz High Vin > 2.0V PCIe 100MHz Bypass Readback Table BYPASS 133 100 Byte0, bit 3 Byte 0 bit 1 Low 0 0 Mid 1 0 High 0 1 IDT 4-OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1, GEN2, AND QPI 2 ICS9DB423B REV E 091812 9DB423 (same as 9DB104) 9DB423 (same as 9DB403)