DATASHEET ISL5761 FN6009 Rev 4.00 10-bit, +3.3V, 130/210+MSPS, High Speed D/A Converter Sep 15, 2015 The ISL5761 is a 10-bit, 130/210+MSPS (Mega Samples Features Per Second), CMOS, high speed, low power, D/A (digital to Speed Grades 130M and 210+MSPS analog) converter, designed specifically for use in high performance communication systems such as base Low Power . 103mW with 20mA Output at 130MSPS transceiver stations utilizing 2.5G or 3G cellular protocols. Adjustable Full Scale Output Current . 2mA to 20mA This device complements the ISL5x61 family of high speed +3.3V Power Supply converters, which include 10, 12, and 14-bit devices. 3V LVCMOS Compatible Inputs Ordering Information Excellent Spurious Free Dynamic Range (71dBc to Nyquist, f = 130MSPS, f = 10MHz) PART TEMP. PACKAGE S OUT NUMBER RANGE (RoHS PKG. CLOCK UMTS Adjacent Channel Power = 65dB at 19.2MHz o (See Note) ( C) Compliant) DWG. SPEED EDGE/GSM SFDR = 83dBc at 11MHz in 20MHz Window ISL5761IBZ -40 to 85 28 Ld SOIC M28.3 130MHz (No longer Pin compatible, 3.3V, Lower Power Replacement For The available, AD9750 and HI5760 recommended replacement: Pb-free available ISL5761IAZ) ISL5761IAZ -40 to 85 28 Ld TSSOP M28.173 130MHz Applications ISL5761/2IBZ -40 to 85 28 Ld SOIC M28.3 210MHz Cellular Infrastructure - Single or Multi-Carrier: IS-136, IS- (No longer 95, GSM, EDGE, CDMA2000, WCDMA, TDS-CDMA available, recommended BWA Infrastructure replacement: Medical/Test Instrumentation ISL5761/2IAZ) Wireless Communication Systems ISL5761/2IAZ -40 to 85 28 Ld TSSOP M28.173 210MHz High Resolution Imaging Systems ISL5761EVAL1 25 SOIC Evaluation Platform 210MHz NOTE: Intersil Pb-free products employ special Pb-free material Arbitrary Waveform Generators sets molding compounds/die attach materials and 100% matte tin plate termination finish, which is compatible with both SnPb and Pinout Pb-free soldering operations. Intersil Pb-free products are MSL ISL5761 classified at Pb-free peak reflow temperatures that meet or exceed TOP VIEW the Pb-free requirements of IPC/JEDEC J Std-020B. 1 28 CLK D9 (MSB) 2 27 DV D8 DD 3 26 DCOM D7 4 25 NC D6 5 24 AV D5 DD 6 23 COMP D4 D3 7 22 IOUTA 8 21 IOUTB D2 9 20 D1 ACOM 10 19 NC D0 (LSB) DCOM 11 18 FSADJ DCOM 12 17 REFIO DCOM 13 16 REFLO DCOM 14 15 SLEEP FN6009 Rev 4.00 Page 1 of 14 Sep 15, 2015ISL5761 Typical Applications Circuit ISL5761 ONE CONNECTION (25, 19) NC (15) SLEEP DCOM ACOM (16) REFLO (17) REFIO D9 D9 (1) 0.1 F D8 D8 (2) D7 D7 (3) (18) FSADJ D6 D6 (4) R 1.91k SET 1:1, Z1:Z2 D5 D5 (5) (22) IOUTA D4 D4 (6) 50 (50 ) (21) IOUTB D3 D3 (7) REPRESENTS D2 D2 (8) ANY 50 LOAD D1 D1 (9) D0 D0 (LSB) (10) (23) COMP CLK (28) 0.1 F DCOM (26, 11-14) 50 (20) ACOM FERRITE BEAD BEAD (24) AV DV (27) DD DD + + 10H 10 H +3.3V (V ) DD 10 F 0.1 F 0.1 F 10 F Functional Block Diagram IOUTA IOUTB CASCODE CURRENT SOURCE INPUT LATCH (LSB) D0 D1 5 LSBs SWITCH 36 36 + D2 MATRIX 31 MSB D3 SEGMENTS D4 D5 D6 UPPER D7 5-BIT D8 DECODER (MSB) D9 COMP CLK INT/EXT BIAS VOLTAGE GENERATION REFERENCE REFLO REFIO FSADJ SLEEP FN6009 Rev 4.00 Page 2 of 14 Sep 15, 2015