Preliminary Data Sheet NP75P03YDG R07DS0020EJ0200 Rev.2.00 MOS FIELD EFFECT TRANSISTOR Mar 16, 2011 Description The NP75P03YDG is P-channel MOS Field Effect Transistor designed for high current switching applications. Features Low on-state resistance R = 6.2 m MAX. (V = 10 V, I = 37.5 A) DS(on) GS D Low C : C = 3200 pF TYP. (V = 25 V, V = 0 V) iss iss DS GS Logic level drive type Designed for automotive application and AEC-Q101 qualified Small size package 8-pin HSON Ordering Information Part No. LEAD PLATING PACKING Package 1 NP75P03YDG -E1-AY Pure Sn (Tin) Tape 2500 p/reel 8-pin HSON, Taping (E1 type) 1 NP75P03YDG -E2-AY 8-pin HSON, Taping (E2 type) Note: 1. Pb-free (This product does not contain Pb in the external electrode.) Absolute Maximum Ratings (T = 25C) A Item Symbol Ratings Unit Drain to Source Voltage (V = 0 V) V 30 V GS DSS Gate to Source Voltage (V = 0 V) V m20 V DS GSS Drain Current (DC) (T = 25C) I m75 A C D(DC) 1 Drain Current (pulse) I m225 A D(pulse) Total Power Dissipation (T = 25C) P 138 W C T1 2 Total Power Dissipation (T = 25C) P 1.0 W A T2 Channel Temperature T 175 C ch Storage Temperature T 55 to +175 C stg 3 Single Avalanche Current I 27 A AS <R> 3 Single Avalanche Energy E 73 mJ AS <R> Thermal Resistance Channel to Case Thermal Resistance R 1.09 C/W th(ch-C) 2 Channel to Ambient Thermal Resistance R 150 C/W th(ch-A) Notes: 1. T = 25C, PW 10 s, Duty Cycle 1% C 2. Mounted on glass epoxy substrate of 40 mm x 40 mm x 0.8 mmt *3. Starting T = 25C, V = 15 V, R = 25 , L = 100 H, V = 20 0 V ch DD G GS <R> The mark <R> shows major revised points. The revised points can be easily searched by copying an<R in the PDF file and specifying it in theFind what field. R07DS0020EJ0200 Rev.2.00 Page 1 of 6 Mar 16, 2011 NP75P03YDG Chapter Title Electrical Characteristics (T = 25C) A Item Symbol Min Typ Max Unit Test Conditions Zero Gate Voltage Drain Current I 1 A V = 30 V, V = 0 V DSS DS GS Gate Leakage Current I m100 nA V = m20 V, V = 0 V GSS GS DS Gate to Source Threshold Voltage V 1.0 1.6 2.5 V V = V , ID = 250 A GS(th) DS GS 1 Forward Transfer Admittance y 30 60 S V = 5 V, I = 37.5 A fs DS D Drain to Source On-state R 4.8 6.2 m V = 10 V, I = 37.5 A DS(on)1 GS D 1 Resistance R 6.2 9.6 m V = 5 V, I = 37.5 A DS(on)2 GS D Input Capacitance C 3200 4800 pF V = 25 V, iss DS Output Capacitance C 660 990 pF V = 0 V, oss GS Reverse Transfer Capacitance C 390 700 pF f = 1 MHz rss Turn-on Delay Time t 13 26 ns V = 15 V, I = 37.5 A, d(on) DD D Rise Time t 13 32 ns V = 10 V, r GS Turn-off Delay Time t 270 540 ns R = 0 d(off) G Fall Time t 180 440 ns f Total Gate Charge Q 94 141 nC V = 24 V, G DD V = 10 V, Gate to Source Charge Q 18 nC GS GS I = 75 A Gate to Drain Charge Q 29 nC D GD 1 Body Diode Forward Voltage V 1.0 1.5 V I = 75 A, V = 0 V F(S-D) F GS Reverse Recovery Time t 62 ns I = 75 A, V = 0 V, rr F GS di/dt = 100 A/ s Reverse Recovery Charge Q 65 nC rr Note: 1. Pulsed TEST CIRCUIT 1 AVALANCHE CAPABILITY TEST CIRCUIT 2 SWITCHING TIME D.U.T. D.U.T. VGS() L RL RG = 25 90% VGS VGS 10% Wave Form 0 RG PG. PG. 50 V DD VDD VGS = 20 0 V VDS() 90% 90% VDS VGS() BVDSS 10% 10% VDS 0 0 Wave Form IAS VDS ID td(on) tr td(off) tf VDD ton toff = 1 s Duty Cycle 1% Starting Tch TEST CIRCUIT 3 GATE CHARGE D.U.T. IG = 2 mA RL PG. 50 VDD R07DS0020EJ0200 Rev.2.00 Page 2 of 6 Mar 16, 2011