DATASHEET 256k, 32k x 8-Bit, 5V, Byte Alterable EEPROM X28HC256 Features The X28HC256 is a second generation high performance Access time: 90ns CMOS 32k x 8 EEPROM. It is fabricated with Intersils Simple byte and page write proprietary, textured poly floating gate technology, providing a -Single 5V supply highly reliable 5V only nonvolatile memory. -No external high voltages or V control circuits P-P The X28HC256 supports a 128-byte page write operation, -Self timed effectively providing a 24s/byte write cycle, and enabling the - No erase before write entire memory to be typically rewritten in less than 0.8s. The - No complex programming algorithms X28HC256 also features DATA polling and Toggle bit polling, - No overerase problem two methods of providing early end of write detection. The X28HC256 also supports the JEDEC standard software data Low power CMOS protection feature for protecting against inadvertent writes - Active: 60mA during power-up and power-down. - Standby: 500A Endurance for the X28HC256 is specified as a minimum Software data protection 100,000 write cycles per byte and an inherent data retention of 100 years. - Protects data against system level inadvertent writes High speed page write capability Highly reliable Direct Write cell - Endurance: 100,000 cycles - Data retention: 100 years Early end of write detection -DATA polling - Toggle bit polling RoHS compliant 256k BIT EEPROM X BUFFERS ARRAY LATCHES AND DECODER A TO A 0 14 ADDRESS INPUTS I/O BUFFERS Y BUFFERS AND LATCHES LATCHES AND DECODER I/O TO I/O 0 7 DATA INPUTS/OUTPUTS CE CONTROL OE LOGIC AND TIMING WE V CC V SS FIGURE 1. BLOCK DIAGRAM March 31, 2015 CAUTION: These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures. 1 1-888-INTERSIL or 1-888-468-3774 Copyright Intersil Americas LLC 2005-2007, 2010, 2011, 2015. All Rights Reserved FN8108.4 Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners.X28HC256 Ordering Information PART NUMBER ACCESS TIME TEMP. RANGE PACKAGE (Note 4)PART MARKING (ns) (C) (RoHS Compliant) PKG. DWG. X28HC256J-15 (Note 1) X28HC256J-15 HY 150 0 to +70 32 Ld PLCC N32.45x55 X28HC256JZ-15 (Notes 1, 3) X28HC256J-15 ZHY 150 0 to +70 32 Ld PLCC N32.45x55 X28HC256JI-15 (Note 1) X28HC256JI-15 HY 150 -40 to +85 32 Ld PLCC N32.45x55 X28HC256JIZ-15 X28HC256JI-15 ZHY 150 -40 to +85 32 Ld PLCC N32.45x55 (Notes 1, 3) X28HC256PZ-15 X28HC256P-15 HYZ 150 0 to +70 28 Ld PDIP E28.6 (Notes 2, 3) X28HC256PIZ-15 X28HC256PI-15 HYZ 150 -40 to +85 28 Ld PDIP E28.6 (Notes 2, 3) X28HC256SI-15 (Note 1) X28HC256SI-15 HY 150 -40 to +85 28 Ld SOIC (300mil) M28.3 X28HC256SIZ-15 (Note 3) X28HC256SI-15 HYZ 150 -40 to +85 28 Ld SOIC (300mil) MDP0027 X28HC256J-12 (Note 1) X28HC256J-12 HY 120 0 to +70 32 Ld PLCC N32.45x55 X28HC256JZ-12 (Notes 1, 3) X28HC256J-12 ZHY 120 0 to +70 32 Ld PLCC N32.45x55 X28HC256JI-12 (Note 1) X28HC256JI-12 HY 120 -40 to +85 32 Ld PLCC N32.45x55 X28HC256JIZ-12 X28HC256JI-12 ZHY 120 -40 to +85 32 Ld PLCC N32.45x55 (Notes 1, 3) X28HC256PZ-12 X28HC256P-12 HYZ 120 0 to +70 28 Ld PDIP E28.6 (Notes 2, 3) X28HC256PIZ-12 X28HC256PI-12 HYZ 120 -40 to +85 28 Ld PDIP E28.6 (Notes 2, 3) X28HC256S-12 X28HC256S-12 HY 120 0 to +70 28 Ld SOIC (300mils) M28.3 X28HC256SZ-12 (Note 3) X28HC256S-12 HYZ 120 0 to +70 28 Ld SOIC (300mils) MDP0027 X28HC256SI-12 X28HC256SI-12 HY 120 -40 to +85 28 Ld SOIC (300mils) M28.3 X28HC256SIZ-12 (Note 3) X28HC256SI-12 HYZ 120 -40 to +85 28 Ld SOIC (300mils) MDP0027 X28HC256JZ-90 (Notes 1, 3) X28HC256J-90 ZHY 90 0 to +70 32 Ld PLCC N32.45x55 X28HC256JI-90 (Note 1) X28HC256JI-90 HY 90 -40 to +85 32 Ld PLCC N32.45x55 X28HC256JIZ-90 X28HC256JI-90 ZHY 90 -40 to +85 32 Ld PLCC N32.45x55 (Notes 1, 3) X28HC256PZ-90 X28HC256P-90 HYZ 90 0 to +70 28 Ld PDIP E28.6 (Notes 2, 3) X28HC256PIZ-90 (Note 3) X28HC256PI-90 HYZ 90 -40 to +85 28 Ld PDIP E28.6 X28HC256S-90 X28HC256S-90 HY 90 0 to +70 28 Ld SOIC (300mils) M28.3 X28HC256SI-90 X28HC256SI-90 HY 90 -40 to +85 28 Ld SOIC (300mils) M28.3 X28HC256SIZ-90 (Note 3) X28HC256SI-90 HYZ 90 -40 to +85 28 Ld SOIC (300mils) MDP0027 NOTES: 1. Add T* suffix for tape and reel. Please refer to TB347 for details on reel specifications. 2. Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. 3. These Intersil plastic packaged products are RoHS compliant by EU exemption 6C and 7A and employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3) termination finish which is compatible with both SnPb and Pb-free soldering operations. Intersil RoHS compliant products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 4. For Moisture Sensitivity Level (MSL), please see product information page for X28HC256. For more information on MSL, please see tech brief TB363. Submit Document Feedback FN8108.4 2 March 31, 2015