ZL9010MIRZ-T

11.45mm DATASHEET Digital DC/DC PMBus 10A Power Module ZL9010M Features The ZL9010M is a 10A adjustable output, step-down Complete digital switch mode power supply synchronous PMBus-compliant digital power supply. Included Auto compensating PID filter in the module is a high-performance digital PWM controller, 1% output voltage accuracy power MOSFETs, an inductor and all the passive components required for a highly integrated DC/DC power solution. This External synchronization power module has built-in auto compensation algorithms, Overcurrent/undercurrent protection which eliminates the need for manual compensation design Output voltage tracking work. The ZL9010M operates over a wide input voltage range and supports an output voltage range of 0.6V to 3.6V, which Current sharing and phase interleaving can be set by external resistors or via PMBus. Only bulk input Programmable sequencing (delay and ramp time) and output capacitors are needed to finish the design. The Snapshot parametric capture output voltage can be precisely regulated to as low as 0.6V with 1% output voltage regulation over line, load and PMBus compliant temperature variations. Applications The ZL9010M functions as a switch mode power supply with added benefits of auto compensation, programmable power Server, telecom and datacom management features, parametric monitoring and status Industrial and medical equipment reporting capabilities. General purpose point-of-load The ZL9010M is packaged in a thermally enhanced, compact (17.2mm x 11.45mm) and low profile (2.5mm) overmolded Related Literature high-density array (HDA) package module suitable for AN2034, Configuring Current Sharing on the ZL2004 and automated assembly by standard surface mount equipment. ZL2006 The ZL9010M is RoHS compliant. Figure 1 represents a typical implementation of the ZL9010M. For PMBus operation, it is recommended to tie the Enable pin (EN) to SGND. V IN 4.5V TO 13.2V 2x22F 16V DGND POWER-GOOD PG OUTPUT VIN ENABLE EN V OUT VOUT EXT SYNC SYNC 2.5mm DDC BUS ZL9010M DDC C OUT SCL SDA PGND PMBus SA R SA R SET *Patent pending package FIGURE 2. SMALL FOOTPRINT PACKAGE WITH LOW PROFILE AT FIGURE 1. TYPICAL APPLICATION CIRCUIT 2.5mm October 30, 2014 CAUTION: These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures. 1 1-888-INTERSIL or 1-888-468-3774 Copyright Intersil Americas LLC 2014. All Rights Reserved FN8422.1 Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. 17.2mm V1 SGND FB+ FB- VDDZL9010M Table of Contents Pin Configuration 3 Pin Descriptions . 3 Pinout Internal Circuit 5 Ordering Information 5 Absolute Maximum Ratings . 7 Thermal Information . 7 Recommended Operating Conditions 7 Electrical Specifications . 7 Typical Performance Curves . 10 Internal Bias and Input Voltage Considerations 14 Design Trade-offs with Switching Frequency . 14 Selection of the Input Capacitor . 14 Selection of the Output Capacitors . 14 Functional Description 15 Multi-mode Pins . 15 PMBus Communications . 15 PMBus Module Address Selection 15 Phase Spreading for a Single-phase Mode of Operation . 16 Output Voltage Selection . 16 Soft-start Delay and Ramp Times 17 Power-Good 18 Switching Frequency and PLL . 18 Loop Compensation . 19 Adaptive Diode Emulation 20 Input Undervoltage Lockout . 20 Output Overvoltage Protection . 20 Output Pre-Bias Protection 20 Output Overcurrent Protection . 21 Thermal Overload Protection 21 Tracking Groups . 23 Voltage Margining . 23 Digital-DC Bus 23 Output Sequencing 24 Fault Spreading . 24 Active Current Sharing . 24 Monitoring via PMBus 25 Temperature Monitoring Using the XTEMP Pin . 25 SnapShot Parameter Capture . 25 Non-Volatile Memory and Device Security Features . 26 Thermal Considerations . 27 Package Description . 27 PCB Layout Pattern Design . 27 Thermal Vias 27 Stencil Pattern Design . 27 Reflow Parameters 28 PMBus Command Summary 28 Firmware Revision History . 67 Revision History 68 About Intersil 68 69 Package Outline Drawing Submit Document Feedback FN8422.1 2 October 30, 2014