Datasheet ZSSC3123 TM cLite Capacitive Sensor Signal Conditioner Description Features The ZSSC3123 is a CMOS integrated circuit for accurate capaci- Maximum target input capacitance: 260pF tance-to-digital conversion and sensor-specific correction of Sampling rates as fast as 0.7ms at 8-bit resolution 1.6ms at capacitive sensor signals. Digital compensation of sensor offset, 10-bit 5.0ms at 12-bit 18.5ms at 14-bit sensitivity, and temperature drift is accomplished via an internal Digital compensation of sensor: piece-wise 1st and 2nd order digital signal processor running a correction algorithm with cali- sensor compensation or up to 3rd order single-region sensor bration coefficients stored in a non-volatile EEPROM. compensation The ZSSC3123 is configurable for capacitive sensors with capaci- Digital compensation of 1st and 2nd order temperature gain tances up to 260pF and a sensitivity of 125aF/LSB to 1pF/LSB and offset drift depending on resolution, speed, and range settings. It is com- Internal temperature compensation reference (no external patible with both single capacitive sensors (both terminals must be components) accessible) and differential capacitive sensors. Measured and Programmable capacitance span and offset corrected sensor values can be output as I2C, SPI, pulse density modulation (PDM), or alarms. Layout customized for die-die bonding with sensor for low- cost, high-density chip-on-board assembly The I2C interface can be used for a simple PC-controlled cali- Accuracy as high as 0.25% FSO at -40C to 125C, 3V, 5V, bration procedure to program a set of calibration coefficients into Vsupply 10% (see data sheet section 5 for restrictions) an on-chip EEPROM. The calibrated ZSSC3123 and a specific sensor are mated digitally: fast, precise, and without the cost Minimized calibration costs: no laser trimming, one-pass overhead of trimming by external devices or laser. calibration using a digital interface Wide capacitance range to support a broad portfolio of different sensor elements Available Support Excellent for low-power battery applications ZSSC3123 SSC Evaluation Kit available: SSC Evaluation I2C or SPI interfaceeasy connection to a microcontroller Board, samples, software, documentation. PDM outputs (Filtered Analog Ratiometric) for both Support for industrial mass calibration available. capacitance and temperature Quick circuit customization option for large production Up to two alarms that can act as full push-pull or open-drain volumes. switches Supply voltage: 2.3V to 5.5V Typical current consumption 750A down to 60A depending Application: Digital Output, Alarms on configuration Typical Sleep Mode current: 1A at 85C V VDD SUPPLY cLite (2.3V to 5.5V) Operation temperature: 40C to +125C depending on part ZSSC3123 Vcore 0.1F 0.1F code Ready Die or 4.4 5.0 mm 14-TSSOP package VSS SDA/MIS O GND SCL/SCLK SS C0 Alarm High Alarm Low CC Nov 19, 2021 Page 1 2021 Renesas Electronics ZSSC3123 Datasheet Block Diagram ZSSC3123 cLite Capacitive Sensor Signal Conditioner VDD (2.3V to 5.5V) Temp Ref Offset Vcore Sensor Cap Cap Ready EEPROM CLK/Reset SCL/SCLK 0.1F PDM SDA/MISO Ready/PDM C I2C / SPI C/A 0.1F Sensor C0 Alarm Low/PDM T D DSP C Low Alarm 0 CC SS CDC C 1 C1 Alarm High High Alarm (Optional) MUX ROM Output Analog Core Digital Core Communication VSS Application: Analog Output Application: Differential Capacitance Input V SUPPLY VDD (+2.3V to 5.5V) VDD V SUPPLY cLite cLite (+2.3V to 5.5V) Vcore ZSSC3123 Vcore ZSSC3123 0.1F 0.1F Cap. 0.1F 0.1F Analog PDM C Ready Output VSS VSS SDA/MISO Temp GND GND C0 SCL/SCLK Analog PDM T Output SS C0 CC LED Alarm High CC Alarm High C1 Alarm Low Nov 19, 2021 Page 2 2021 Renesas Electronics