TS13401 Neo-Iso Solid State Relay Driver with Sensing and Power Transfer POWER MANAGEMENT Features Description The TS13401 is a galvanically isolated 60V power FET Low Quiescent Operating Currents driver with bi-directional blocking. The state of the 15A in ON state 2mA in Sensing Mode switch and other product features are controlled by sending commands on the CLK input. Switch to controller scalable galvanic isolation Single control signal for input commands The TS13401 supports several sensing modes where Microcontroller-compatible levels the switch state, load current, supply voltage and Switch Characteristics device temperature can be sampled. The digitized Bi-directional blocking in OFF state measurements can be read back from the device on Up to 60V FETs supported the DATA pin when requested on the CLK pin. In Up to 10A current during inrush addition, TS13401 supports power transfer from the and 5A continuous operation systems AC supply to the low-voltage controller Operating Modes domain. Zero-cross ON / OFF The TS13401 includes several protection features. The Immediate ON / OFF switch will open in self protection if current exceeds Dithering Mode for system power sharing the over-current limit or if the device temperature limit Switch state polling is exceeded. The switch will remain open until a new Sensing Modes for system data acquisition turn on sequence is given through CLK. Applications Summary Specification Power load/rail switching Junction operating temperature -40 C to 125 C Input supply multiplexing Packaged in a 20 pin QFN (3mm x 3mm) Isolated power supplies Product is lead-free, Halogen Free, RoHS / WEEE Solid state relays compliant HVAC control Sprinkler control Internet of Things (IoT) Typical Application C VDD C C VGG5 VGG10 R WD VDD SRC VGG5 VGG10 C WD Regulator WD CPTO C PTO REG C SYS SYSP V AC SW1 VCC AD2 GATE1 TS13401 AD1 GATE2 AD0 C C ISO Load SW2 GPIO1 CLK CVCC SYSM GPIO2 DATA C SUB DATA C SUB TS13401 1 of 19 Final Datasheet Rev 1.0 Semtech July 21, 2017 Proprietary & Confidential Pin Description Pin Symbol Pin Function Description SUB 1 IC Substrate Connection Connect substrate capacitor from SUB to SYSM SYSP 2 Positive System Voltage Power is harvested from the SW pins SYSM 3 Negative System Voltage Power is harvested from the SW pins VDD 4 Bias Voltage Output Connect VDD Capacitor to SYSM PTO 5 Power Transfer Output Connect to Power Transfer Capacitor C PTO CLK 6 Clock Input Galvanically Isolated Clock Input DATA 7 Data Output Galvanically Isolated Data Output For logic 0, must be tied to SRC on PCB AD2 8 Address Select 2 For logic 1, must be tied to VGG5 on PCB For logic 0, must be tied to SRC on PCB AD1 9 Address Select 1 For logic 1, must be tied to VGG5 on PCB N/C 10 No Connect For logic 0, must be tied to SRC on PCB AD0 11 Address Select 0 For logic 1, must be tied to VGG5 on PCB WD 12 Watch Dog Control input for latching vs non-latching switch Bulk connection of switch, connect to VGG5, VGG10 SRC 13 Source capacitors VGG5 14 Bias Voltage Output Connect VGG5 Capacitor to SRC VGG10 15 Bias Voltage Output Connect VGG10 Capacitor to SRC SW2 16 Switch Output Node 2 GATE2 17 Gate 2 Connect to gate of switch between SRC and SW2 18 Source Connect to source of external switches SRC GATE1 19 Gate 1 Connect to gate of switch between SRC and SW1 20 Switch Output Node 1 SW1 SUB PAD Thermal Input Connect thermally to the FET chip TS13401 2 of 19 Final Datasheet Rev 1.0 Semtech July 21, 2017 Proprietary & Confidential