SLG59M1735C-EVB Silego

GreenFET3 SLG59M1735C Layout Guide Content 1. Description 2. Power and Ground Planes 3. Basic Test Setup and Connections Description The SLG59M1735C is a 9.5 m, ~ 4 A single- channel load switch that is able to switch 0.9 V to 5.5 V power rails. The product is packaged in an ultra-small 0.96 x 1.56 mm package. Figure 1: SLG59M1735C Block Diagram GND GND GND ON VDD C4 0.1uF C3 CAP/RSET Array 3.9nF U1 1 2 1 8 VDD GND 3 4 2 7 ON CAP 5 6 3 6 D S 7 8 4 5 D S 9 10 C1 C2 10uF 10uF RL RL GND D/VIN D SENSE GND S/VOUT S SENSE Figure 5. SLG59M1735C Connection Circuit for Evaluation board 11 1 1 1 2 3 1 1 1 1 1 1 1 1 1 1 1 1 1 2. Power and Ground Planes 2.1. The VDD pin (A1) needs a 0.1uF external capacitors to smooth pulses from the power supply. Locate this capacitor as close to A1. 2.2. The trace length from the control IC to the ON pin should be as short as possible and must avoid crossing this trace with power rails. 2.3. The D/VIN and S/VOUT pins carry significant current. Please note how the D/VIN and S/VOUT pads are placed directly on the power planes in Figure 3, which minimizes the RDS associated ON with long, narrow traces. The D/VIN, S/VOUT and GND pins dissipate most of the heat generated during high-load current condition. The layout shown in Figure 3 and Figure 4 is illustrating a proper solution for heat to transfer as efficiently as possible out of the device. 2.4. Place the power rail ramp capacitor as close as possible to the CAP pin (B2) to avoid/reduce the effect of parasitic mount capacitance. 2.5. The GND pin (A2) should be connected to GND. 2.6. 2 oz. copper is recommended for higher currents. GND GND GND ON VDD C4 0.1uF C3 3.9nF U1 1 8 VDD GND 2 7 ON CAP 3 6 D S 4 5 D S C1 C2 10uF 10uF RL GND D/VIN D SENSE GND S/VOUT S SENSE Figure 6. SLG59M1735C Connection Circuit for Evaluation board 11v2 1 1 1 2 3 1 1 1 1 1 1 1 1 1 1 1 1 1