SLG46169V-SKT Silego

Is Now Part of To Learn more about Dialog Semiconductor, please visit our website at SLG46169 GreenPAK Programmable Mixed-signal Matrix Features Pin Configuration Logic & Mixed Signal Circuits Highly Versatile Macrocells Read Back Protection (Read Lock) 1.8 V (5%) to 5 V (10%) Supply 1 12 Operating Temperature Range: -40C to 85C VDD GPIO RoHS Compliant / Halogen-Free 14 13 2 11 GPI GPIO 14-pin STQFN: 2 x 2.2 x 0.55 mm, 0.4 mm pitch 3 10 GPIO GPIO Applications 4 9 GPIO GND Personal Computers and Servers 6 7 PC Peripherals 5 8 GPIO GPIO Consumer Electronics Data Communications Equipment Handheld and Portable Electronics 14-pin STQFN (Top View) Block Diagram Pin 14 Pin 13 GPIO GPIO Pin 12 Pin 1 GPIO VDD Counters/Delay Generators Look Up Tables (LUTs) 2-bit 2-bit 3-bit CNT0 CNT1 CNT4 LUT2 4 LUT2 5 LUT3 0 Pin 11 Pin 2 GPIO GPI CNT5 CNT6 3-bit 3-bit 3-bit LUT3 1 LUT3 4 LUT3 5 3-bit 3-bit 3-bit LUT3 6 LUT3 7 LUT3 9 ACMP0 Additional Logic Functions Pin 3 Pin 10 INV 0 INV 1 GPIO GPIO Combination Function Macrocells FILTER 1 FILTER 0 2-bit 2-bit 2-bit LUT2 0 LUT2 1 LUT2 2 ACMP1 or DFF4 or DFF5 or DFF6 2-bit 3bit 3-bit LUT2 3 LUT3 2 LUT3 3 Pin 9 RC Oscillator Vref Pin 4 or DFF7 or DFF2 or DFF3 GND GPIO 3-bit 4-bit 4-bit LUT3 8 or LUT4 0 LUT4 1 Pipe Delay or CNT2 or CNT3 Programmable Delay Pin 8 Pin 5 GPIO GPIO Pin 6 Pin 7 GPIO GPIO Silego Technology, Inc. Rev 1.08 000-0046169-108 Revised October 30, 2019 GPIO GPIO GPIO GPIO