74LVCZ161284ATTR STMicroelectronics

74LVCZ161284A LOW VOLTAGE HIGH SPEED IEEE1284 TRANSCEIVER WITH ERROR-FREE POWER-UP HIGH SPEED: t = 9ns (MAX.) at V = 3V PD CC LOW POWER DISSIPATION: I =20 A (MAX) at V =3.6V T =85C CC CC A TTL COMPATIBLE INPUTS V =2V (MIN) V =0.8(MAX) IH IL OPERATING VOLTAGE RANGE: TSSOP V (OPR) = 3.0V to 3.6V CC A PORT HAVE STANDARD 4mA TOTEM POLE OUTPUT B PORT HIGH DRIVE SOURCE/SINK ORDER CODES CAPABILITY OF 14mA PACKAGE TUBE T & R AUTO POWER-UP FEATURE TO PREVENT TSSOP 74LVCZ161284ATTR PRINTER ERRORS SUPPORT IEEE STD 1284-I (LEVEL 1 TYPE) PIN CONNECTION AND IEEE STD 1284-II (LEVEL 2 TYPE) FOR BIDIRECTIONAL PARALLEL COMMUNICATIONS BETWEEN PERSONAL COMPUTER ANT PRINTING PERIPHERALS TRANSLATION CAPABILITY ALLOW OUTPUTS ON CABLE SIDE TO INTERFACE WITH 5V SIGNAL PULL-UP RESISTOR INTEGRATED ON ALL OPEN-DRAIN OUTPUT ELIMINATE THE NEED FOR DISCRETE RESISTOR REPLACE THE FUNCTION OF TWO 74LVC1284 DEVICES DESCRIPTION The 74LVCZ161284A contains eight high speed non inverting bidirectional buffers and eleven control/status non-inverting buffers with open 2 drain outputs fabricated in silicon gate C MOS technology. Its intended to provide a standard signaling method for a bi-direction parallel peripheral in an Extended Capabilities Port Mode (ECP). The HD (Active HIGH) input pin enables the Cable port to switch from Open Drain to a high drive totem pole output, capable of sourcing 14mA on all thirteen buffer and 84mA on PERI LOGIC OUTPUT buffer. The DIR input determines the direction of data flow on the bidirectional buffers. DIR (Active HIGH) enables data flow from A port to B port. DIR (Active LOW) enables data flow from B port to A port. The Y output (Y9-Y13) stay in the high state after power-on until an associated input A9-A13) goes high. When an associated input goes high, all Y outputs are active, and non July 2005 1/12 Obsolete Product(s) - Obsolete Product(s)74LVCZ161284A inverting signals of the associated inputs are power-on. driven through Y outputs. This special feature It is available in the commercial temperature prevents printer system errors caused by range. deasserting the BUSY signal in the cable at LOGIC DIAGRAM NOTE A: The PMOS transistors prevent backdriving current from the signal pins to V when V is open or at GND. The CC/CABLE CC/CABLE PMOS transistor is turned off when the associated driver is in the low state. NOTE B: The PMOS transistor prevents backdriving current from the signal pins to V when V is open or at GND. CC/CABLE CC/CABLE NOTE C: Active input detection circuit forces Y9-Y13 to the low state after power-on until one of the A9-A13 goes high. See below. ACTIVE INPUT DETECTION CIRCUIT 2/12 Obsolete Product(s) - Obsolete Product(s)