M95640-DFCT6TP/K STMicroelectronics

M95640-W M95640-R M95640-DF 64-Kbit serial SPI bus EEPROM with high-speed clock Datasheet - production data Features Compatible with the Serial Peripheral Interface (SPI) bus Memory array 64 Kb (8 Kbytes) of EEPROM SO8 (MN) 150 mil width Page size: 32 bytes Write Byte Write within 5 ms Page Write within 5 ms Additional Write lockable page (Identification page) TSSOP8 (DW) Write Protect: quarter, half or whole memory 169 mil width array High-speed clock: 20 MHz Single supply voltage: 2.5 V to 5.5 V for M95640-W 1.8 V to 5.5 V for M95640-R UFDFPN8 (MC) 1.7 V to 5.5 V for M95640-DF 2 x 3 mm Operating temperature range: from -40C up to +85C Enhanced ESD protection More than 4 million Write cycles More than 200-year data retention WLCSP (CT) Packages: SO8 (ECOPACK2 ) TSSOP8 (ECOPACK2 ) UFDFPN8 (ECOPACK2 ) WLCSP (ECOPACK2 ) February 2016 DocID16877 Rev 19 1/53 This is information on a product in full production. www.st.comContents M95640-W M95640-R M95640-DF Contents 1 Description . 6 2 Memory organization 8 3 Signal description . 9 3.1 Serial Data Output (Q) 9 3.2 Serial Data Input (D) 9 3.3 Serial Clock (C) . 9 3.4 Chip Select (S) 9 3.5 Hold (HOLD) 9 3.6 Write Protect (W) . 10 3.7 V supply voltage 10 CC 3.8 V ground 10 SS 4 Connecting to the SPI bus . 11 4.1 SPI modes 12 5 Operating features . 13 5.1 Supply voltage (V ) 13 CC 5.1.1 Operating supply voltage (V ) . 13 CC 5.1.2 Device reset 13 5.1.3 Power-up conditions . 13 5.1.4 Power-down 14 5.2 Active Power and Standby Power modes 14 5.3 Hold condition 14 5.4 Status Register . 15 5.5 Data protection and protocol control 15 6 Instructions . 16 6.1 Write Enable (WREN) . 17 6.2 Write Disable (WRDI) 18 6.3 Read Status Register (RDSR) . 19 6.3.1 WIP bit 19 2/53 DocID16877 Rev 19