STG4260 Low voltage 0.5 dual SPDT switch with break-before-make feature and 15 kV ESD protection Features Wide operating voltage range: V (OPR) = 1.65 to 4.8 V CC Low power dissipation: I = 0.2 A (max.) at T = 85 C CC A LowO resistance: R = 0.75 (T = 25 C) at ON A V = 2.25 V CC R = 0.50 (T = 25 C) at ON A Flip-chip 12 V = 3.0 V CC R =0.40 (T =25C) at ON A V =4.3 V CC Description Separate supply voltage for switch and control The STG4260 is a high-speed CMOS low voltage pin dual analog SPDT (single pole dual throw) switch Latch-up performance exceeds 100 mA per or 2:1 multiplexer/demultiplexer switch fabricated JESD 78, Class II 2 in silicon gate C MOS technology. It is designed ESD performance tested on common pin to operate from 1.65 V to 4.8 V, making this device (D pin): ideal for portable applications. It offers low ON- 15 kV IEC-61000-4-2 ESD, contact resistance (0.40 typ.) at V = 4.3 V. The SEL CC discharge inputs are provided to control the switches. 8 kV HBM JESD22 A114-B Class II The switch S1 is ON (connected to common port ESD performance tested on S1 and S2 pin: D) when the SEL input is held high and OFF (high impedance state exists between the two ports) 8 kV IEC-61000-4-2 ESD, contact when SEL is held low the switch S2 is ON (it is discharge connected to common Port D) when the SEL input ESD performance test on all other pins: is held low and OFF (high impedance state exists 4 kV HBM (JESD22 A114-B Class II) between the two ports) when SEL is held high. 400 V machine model (JESD22 A115-A) Additional key features are fast switching speed, 1500 V charged-device model break-before-make delay time and ultra low power (JESD22 C101) consumption. All inputs and outputs are equipped with protection circuits against static discharge, Applications giving them ESD immunity and transient excess voltage. Mobile phones Table 1. Device summary Order code Package Packing STG4260BJR Flip-chip 12 Tape and reel April 2009 Doc ID 15168 Rev 2 1/19 www.st.com 19 Contents STG4260 Contents 1 Pin settings 3 1.1 Pin connections 3 1.2 Pin description . 3 2 Logic diagram 4 3 Maximum ratings 5 4 Electrical characteristics . 6 5 Test circuits . 10 6 Package mechanical data 14 7 Revision history . 18 2/19 Doc ID 15168 Rev 2